[PATCH] D16829: An implementation of Swing Modulo Scheduling

[Brendon Cahoon via llvm-commits]

bcahoon updated this revision to Diff 65365.
bcahoon added a comment.

Rebased the patch. There were some API changes to resolve.

I've included several bug fixes since the last update, including:

- Updates to with deal physical registers. The register pressure code needs to check for physical registers. Also, the pipeliner does not allow a schedule that generates a loop carrried dependence for a physical register.
- A bug fix to the code that generates Phis for the pipelined loop.
- A bug fix to the code that generates the final instruction order, when serializing the instructions.

Unless there is an objection, I'd like to be able to commit this code. There are several other folks that use the patch, and it would be great to enable them to make updates and improvements to the software pipeliner.  This patch enables the pipeliner for the Hexagon target. I think there is a good opportunity for others to contribute to the pass, to improve the functionality, and to enable it for other targets.


https://reviews.llvm.org/D16829

Files:
  include/llvm/CodeGen/Passes.h
  include/llvm/InitializePasses.h
  include/llvm/Target/TargetInstrInfo.h
  lib/CodeGen/CMakeLists.txt
  lib/CodeGen/CodeGen.cpp
  lib/CodeGen/MachinePipeliner.cpp
  lib/Target/Hexagon/HexagonInstrInfo.cpp
  lib/Target/Hexagon/HexagonInstrInfo.h
  lib/Target/Hexagon/HexagonTargetMachine.cpp
  test/CodeGen/Hexagon/hwloop1.ll
  test/CodeGen/Hexagon/swp-const-tc.ll
  test/CodeGen/Hexagon/swp-dag-phi.ll
  test/CodeGen/Hexagon/swp-epilog-reuse.ll
  test/CodeGen/Hexagon/swp-matmul-bitext.ll
  test/CodeGen/Hexagon/swp-max.ll
  test/CodeGen/Hexagon/swp-multi-loops.ll
  test/CodeGen/Hexagon/swp-vect-dotprod.ll
  test/CodeGen/Hexagon/swp-vmult.ll
  test/CodeGen/Hexagon/swp-vsum.ll
  test/CodeGen/Hexagon/v60-cur.ll

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