[PATCH] D22448: [AArch64] Cache line size and PredictableSelectIsExpensive for Vulcan

[Hans Wennborg via llvm-commits]

Tim: ping?

On Fri, Jul 22, 2016 at 6:26 AM, Hans Wennborg <hans at chromium.org> wrote:
> Hi Pankaj,
>
> llvm-commits is the right list.
>
> Tim: is this OK for 3.9?
>
> Thanks,
> Hans
>
> On Fri, Jul 22, 2016 at 5:09 AM, Pankaj Gode <pankaj.gode at broadcom.com> wrote:
>> Hi Hans,
>>
>> I have request to merge the commit rL275978 to the 3.9 branch.
>> I am not sure which mailing list I should reply. Is this
>> 'llvm-branch-commits at lists.llvm.org' the mailing list I should reply?
>> Please guide me.
>>
>> The commit message for commit rL275978 are below.
>> ----------------------
>>
>> [AArch64] PredictableSelectIsExpensive for Vulcan.
>>
>> Adding PredictableSelectIsExpensive for Vulcan
>>
>> Tue Jul 19 09:30:21 2016 CDT (2 days, 18 hours ago)
>>
>> https://llvm.org/svn/llvm-project/llvm/trunk@275978
>> 91177308-0d34-0410-b5e6-96231b3b80d8
>>
>> ----------------------
>>
>> Thanks & Regards,
>> Pankaj
>>
>>
>>
>> On Tue, Jul 19, 2016 at 8:07 PM, pankaj gode <pankaj.gode at broadcom.com>
>> wrote:
>>>
>>> This revision was automatically updated to reflect the committed changes.
>>> Closed by commit rL275978: [AArch64] PredictableSelectIsExpensive for
>>> Vulcan. (authored by pgode).
>>>
>>> Changed prior to commit:
>>>   https://reviews.llvm.org/D22448?vs=64484&id=64499#toc
>>>
>>> Repository:
>>>   rL LLVM
>>>
>>> https://reviews.llvm.org/D22448
>>>
>>> Files:
>>>   llvm/trunk/lib/Target/AArch64/AArch64.td
>>>
>>> Index: llvm/trunk/lib/Target/AArch64/AArch64.td
>>> ===================================================================
>>> --- llvm/trunk/lib/Target/AArch64/AArch64.td
>>> +++ llvm/trunk/lib/Target/AArch64/AArch64.td
>>> @@ -250,6 +250,7 @@
>>>                                     FeatureMacroOpFusion,
>>>                                     FeatureNEON,
>>>                                     FeaturePostRAScheduler,
>>> +                                   FeaturePredictableSelectIsExpensive,
>>>                                     HasV8_1aOps]>;
>>>
>>>  def : ProcessorModel<"generic", NoSchedModel, [
>>>
>>>
>>