[PATCH] D19906: [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions

[Simon Dardis via llvm-commits]

sdardis accepted this revision.
sdardis added a comment.
This revision is now accepted and ready to land.

LGTM with two things: move the BrcondPats out of the NotInMicroMips block, otherwise we get the same bug that this patch addresses, except it affects microMIPS64R6. The second is the placement of a comment. More details inline.


================
Comment at: lib/Target/Mips/Mips64InstrInfo.td:539-540
@@ -539,3 +538,4 @@
 
-defm : BrcondPats<GPR64, BEQ64, BNE64, SLT64, SLTu64, SLTi64, SLTiu64,
-                  ZERO_64>;
+  defm : BrcondPats<GPR64, BEQ64, BEQ, BNE64, SLT64, SLTu64, SLTi64, SLTiu64,
+                    ZERO_64>;
+}
----------------
By moving the pattern instantiation into the block covered by NotInMicroMips, LLVM cannot fall back to picking MIPS64R6 instructions for microMIPS64R6. The instruction mapping tables will correct this for direct object emission and the assembly is identical for microMIPS64R6.

Can you move this out of the NotInMicroMips block?

================
Comment at: lib/Target/Mips/Mips64InstrInfo.td:549
@@ -548,1 +548,3 @@
+let AdditionalPredicates = [NotInMicroMips] in {
 // setcc patterns
+  defm : SeteqPats<GPR64, SLTiu64, XOR64, SLTu64, ZERO_64>;
----------------
Place this comment above the 'let AdditionalPredicates..' line.


https://reviews.llvm.org/D19906