[PATCH] D22489: AMDGPU/SI: Implement readlane/readfirstlane intrinsics to expose the instructions.

[Changpeng Fang via llvm-commits]

cfang updated this revision to Diff 64615.
cfang added a comment.

update based on Matt's comments:

1. Remove unnecessary comments in intrinsic definitions;
2. move the pattern defs into instructions;
3. add imm src test cases;
4. remove unnecessary attributes at call sites;
5. put "nounwind" into a new attribute group.

NOTE: M0 test case is not added in this update.


https://reviews.llvm.org/D22489

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
  lib/Target/AMDGPU/SIInstructions.td
  lib/Target/AMDGPU/SIRegisterInfo.td
  test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D22489.64615.patch
Type: text/x-patch
Size: 6184 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160720/ac186f66/attachment.bin>