[llvm] r276024 - add even more missing tests for simplifySelectBitTest()
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 19 13:47:12 PDT 2016
Author: spatel
Date: Tue Jul 19 15:47:00 2016
New Revision: 276024
URL: http://llvm.org/viewvc/llvm-project?rev=276024&view=rev
Log:
add even more missing tests for simplifySelectBitTest()
Modified:
llvm/trunk/test/Transforms/InstSimplify/select.ll
Modified: llvm/trunk/test/Transforms/InstSimplify/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/select.ll?rev=276024&r1=276023&r2=276024&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstSimplify/select.ll (original)
+++ llvm/trunk/test/Transforms/InstSimplify/select.ll Tue Jul 19 15:47:00 2016
@@ -127,63 +127,182 @@ define i32 @select_icmp_and_8_eq_0_or_8(
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%or = or i32 %x, 8
- %or.x = select i1 %cmp, i32 %or, i32 %x
- ret i32 %or.x
+ %sel = select i1 %cmp, i32 %or, i32 %x
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_eq_0_or_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8_alt(
+; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 8
+; CHECK-NEXT: ret i32 [[OR]]
+;
+ %and = and i32 %x, 8
+ %cmp = icmp ne i32 %and, 0
+ %or = or i32 %x, 8
+ %sel = select i1 %cmp, i32 %x, i32 %or
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_ne_0_or_8(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_ne_0_or_8(
+; CHECK-NEXT: ret i32 %x
+;
+ %and = and i32 %x, 8
+ %cmp = icmp ne i32 %and, 0
+ %or = or i32 %x, 8
+ %sel = select i1 %cmp, i32 %or, i32 %x
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_ne_0_or_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_ne_0_or_8_alt(
+; CHECK-NEXT: ret i32 %x
+;
+ %and = and i32 %x, 8
+ %cmp = icmp eq i32 %and, 0
+ %or = or i32 %x, 8
+ %sel = select i1 %cmp, i32 %x, i32 %or
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8(
+; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -9
+; CHECK-NEXT: ret i32 [[AND1]]
+;
+ %and = and i32 %x, 8
+ %cmp = icmp eq i32 %and, 0
+ %and1 = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %x, i32 %and1
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_eq_0_and_not_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8_alt(
+; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -9
+; CHECK-NEXT: ret i32 [[AND1]]
+;
+ %and = and i32 %x, 8
+ %cmp = icmp ne i32 %and, 0
+ %and1 = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %and1, i32 %x
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8(
+; CHECK-NEXT: ret i32 %x
+;
+ %and = and i32 %x, 8
+ %cmp = icmp ne i32 %and, 0
+ %and1 = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %x, i32 %and1
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_ne_0_and_not_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8_alt(
+; CHECK-NEXT: ret i32 %x
+;
+ %and = and i32 %x, 8
+ %cmp = icmp eq i32 %and, 0
+ %and1 = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %and1, i32 %x
+ ret i32 %sel
}
; PR28466: https://llvm.org/bugs/show_bug.cgi?id=28466
+; Each of the previous 8 patterns has a variant that replaces the
+; 'and' with a 'trunc' and the icmp eq/ne with icmp slt/sgt.
-define i32 @select_icmp_trunc_8_eq_0_or_8(i32 %x) {
-; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_8(
+define i32 @select_icmp_trunc_8_ne_0_or_128(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128(
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i8
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TRUNC]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TRUNC]], -1
; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 %x
; CHECK-NEXT: ret i32 [[SEL]]
;
%trunc = trunc i32 %x to i8
- %cmp = icmp slt i8 %trunc, 0
+ %cmp = icmp sgt i8 %trunc, -1
%or = or i32 %x, 128
%sel = select i1 %cmp, i32 %or, i32 %x
ret i32 %sel
}
-define i32 @select_icmp_and_8_ne_0_or_128(i32 %x) {
-; CHECK-LABEL: @select_icmp_and_8_ne_0_or_128(
-; CHECK-NEXT: ret i32 %x
+define i32 @select_icmp_trunc_8_ne_0_or_128_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128_alt(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i8
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TRUNC]], 0
+; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 [[OR]]
+; CHECK-NEXT: ret i32 [[SEL]]
;
- %and = and i32 %x, 128
- %cmp = icmp eq i32 %and, 0
+ %trunc = trunc i32 %x to i8
+ %cmp = icmp slt i8 %trunc, 0
%or = or i32 %x, 128
- %or.x = select i1 %cmp, i32 %x, i32 %or
- ret i32 %or.x
+ %sel = select i1 %cmp, i32 %x, i32 %or
+ ret i32 %sel
}
-define i32 @select_icmp_trunc_8_ne_0_or_128(i32 %x) {
-; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128(
+define i32 @select_icmp_trunc_8_eq_0_or_128(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_128(
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i8
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TRUNC]], 0
; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 [[OR]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 %x
; CHECK-NEXT: ret i32 [[SEL]]
;
%trunc = trunc i32 %x to i8
%cmp = icmp slt i8 %trunc, 0
%or = or i32 %x, 128
+ %sel = select i1 %cmp, i32 %or, i32 %x
+ ret i32 %sel
+}
+
+define i32 @select_icmp_trunc_8_eq_0_or_128_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_128_alt(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i8
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TRUNC]], -1
+; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 [[OR]]
+; CHECK-NEXT: ret i32 [[SEL]]
+;
+ %trunc = trunc i32 %x to i8
+ %cmp = icmp sgt i8 %trunc, -1
+ %or = or i32 %x, 128
%sel = select i1 %cmp, i32 %x, i32 %or
ret i32 %sel
}
-define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
-; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8(
-; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -9
-; CHECK-NEXT: ret i32 [[AND1]]
+define i32 @select_icmp_trunc_8_eq_0_and_not_8(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i4
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i4 [[TRUNC]], -1
+; CHECK-NEXT: [[AND:%.*]] = and i32 %x, -9
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 [[AND]]
+; CHECK-NEXT: ret i32 [[SEL]]
;
- %and = and i32 %x, 8
- %cmp = icmp eq i32 %and, 0
- %and1 = and i32 %x, -9
- %x.and1 = select i1 %cmp, i32 %x, i32 %and1
- ret i32 %x.and1
+ %trunc = trunc i32 %x to i4
+ %cmp = icmp sgt i4 %trunc, -1
+ %and = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %x, i32 %and
+ ret i32 %sel
+}
+
+define i32 @select_icmp_trunc_8_eq_0_and_not_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8_alt(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i4
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i4 [[TRUNC]], 0
+; CHECK-NEXT: [[AND:%.*]] = and i32 %x, -9
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+;
+ %trunc = trunc i32 %x to i4
+ %cmp = icmp slt i4 %trunc, 0
+ %and = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %and, i32 %x
+ ret i32 %sel
}
define i32 @select_icmp_trunc_8_ne_0_and_not_8(i32 %x) {
@@ -201,27 +320,16 @@ define i32 @select_icmp_trunc_8_ne_0_and
ret i32 %sel
}
-define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
-; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8(
-; CHECK-NEXT: ret i32 %x
-;
- %and = and i32 %x, 8
- %cmp = icmp eq i32 %and, 0
- %and1 = and i32 %x, -9
- %and1.x = select i1 %cmp, i32 %and1, i32 %x
- ret i32 %and1.x
-}
-
-define i32 @select_icmp_trunc_8_eq_0_and_not_8(i32 %x) {
-; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8(
+define i32 @select_icmp_trunc_8_ne_0_and_not_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_ne_0_and_not_8_alt(
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i4
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i4 [[TRUNC]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i4 [[TRUNC]], -1
; CHECK-NEXT: [[AND:%.*]] = and i32 %x, -9
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 %x
; CHECK-NEXT: ret i32 [[SEL]]
;
%trunc = trunc i32 %x to i4
- %cmp = icmp slt i4 %trunc, 0
+ %cmp = icmp sgt i4 %trunc, -1
%and = and i32 %x, -9
%sel = select i1 %cmp, i32 %and, i32 %x
ret i32 %sel
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