[PATCH] D22497: AMDGPU: Fix groupstaticsize for large LDS

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 18 19:14:37 PDT 2016


arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added subscribers: kzhuravl, arsenm.

The size can exceed s_movk_i32's limit, and we don't
want to use it this early since it inhibits optimizations.
    
This should probably be merged to the release branch.

https://reviews.llvm.org/D22497

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp
  test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll

Index: test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll
===================================================================
--- test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll
+++ test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll
@@ -5,8 +5,10 @@
 @lds0 = addrspace(3) global [512 x float] undef, align 4
 @lds1 = addrspace(3) global [256 x float] undef, align 4
 
+ at large = addrspace(3) global [4096 x i32] undef, align 4
+
 ; CHECK-LABEL: {{^}}groupstaticsize_test0:
-; CHECK: s_movk_i32 s{{[0-9]+}}, 0x800
+; CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0x800{{$}}
 define void @groupstaticsize_test0(float addrspace(1)* %out, i32 addrspace(1)* %lds_size) #0 {
   %tid.x = tail call i32 @llvm.amdgcn.workitem.id.x() #1
   %idx.0 = add nsw i32 %tid.x, 64
@@ -20,7 +22,7 @@
 }
 
 ; CHECK-LABEL: {{^}}groupstaticsize_test1:
-; CHECK: s_movk_i32 s{{[0-9]+}}, 0xc00
+; CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0xc00{{$}}
 define void @groupstaticsize_test1(float addrspace(1)* %out, i32 %cond, i32 addrspace(1)* %lds_size) {
 entry:
   %static_lds_size = call i32 @llvm.amdgcn.groupstaticsize() #1
@@ -46,6 +48,17 @@
   ret void
 }
 
+; Exceeds 16-bit simm limit of s_movk_i32
+; CHECK-LABEL: {{^}}large_groupstaticsize:
+; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0x4000{{$}}
+define void @large_groupstaticsize(i32 addrspace(1)* %size, i32 %idx) #0 {
+  %gep = getelementptr inbounds [4096 x i32], [4096 x i32] addrspace(3)* @large, i32 0, i32 %idx
+  store volatile i32 0, i32 addrspace(3)* %gep
+  %static_lds_size = call i32 @llvm.amdgcn.groupstaticsize()
+  store i32 %static_lds_size, i32 addrspace(1)* %size
+  ret void
+}
+
 declare i32 @llvm.amdgcn.groupstaticsize() #1
 declare i32 @llvm.amdgcn.workitem.id.x() #1
 
Index: lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- lib/Target/AMDGPU/SIISelLowering.cpp
+++ lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1450,7 +1450,7 @@
     MachineFunction *MF = BB->getParent();
     SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>();
     DebugLoc DL = MI.getDebugLoc();
-    BuildMI(*BB, MI, DL, TII->get(AMDGPU::S_MOVK_I32))
+    BuildMI(*BB, MI, DL, TII->get(AMDGPU::S_MOV_B32))
       .addOperand(MI.getOperand(0))
       .addImm(MFI->getLDSSize());
     MI.eraseFromParent();


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