[PATCH] D22489: AMDGPU/SI: Implement readlane/readfirstlane intrinsics to expose the instructions.

[Changpeng Fang via llvm-commits]

cfang created this revision.
cfang added reviewers: arsenm, tstellarAMD.
cfang added subscribers: arsenm, llvm-commits.
Herald added a subscriber: kzhuravl.

This patch defines a new register class (VM0_32 = VReg_32 + M0) and implements readlane and readfirstlane intrinsics.

https://reviews.llvm.org/D22489

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
  lib/Target/AMDGPU/SIInstructions.td
  lib/Target/AMDGPU/SIRegisterInfo.td
  test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll

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