[PATCH] D22456: [X86][SSE] Add cost model values for CTPOP of vectors

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 18 16:48:48 PDT 2016


spatel added a subscriber: mzolotukhin.
spatel added a comment.

A couple of links for reference...

1. @mkuper mentioned changing the scalar cost of an op here:

https://llvm.org/bugs/show_bug.cgi?id=28434#c4

2. There was some discussion about the various cost models here:

https://llvm.org/bugs/show_bug.cgi?id=26837

@mzolotukhin made a good point there: it's not clear whether we actually should differentiate for CPUs at this level (this is IR after all). A better solution might be to have the most conservative or the most common values as part of the cost model here, and then expect the backend to fix that up for particular CPU models.

The scary part about that currently is how bad the backend is at deconstructing too-wide vector IR code. This shows up even today in the semi-legal case of AVX where we have 256-bit registers but no 256-bit integer ops. This causes trouble in several cases I've seen. Ie, we would have done much better if we just pretended that we only have 128-bit registers for those targets.


Repository:
  rL LLVM

https://reviews.llvm.org/D22456





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