[PATCH] D22194: Power9 - Add exploitation of oris/ori fusion

[Ehsan Amiri via llvm-commits]

amehsan added inline comments.

================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:1674-1681
@@ -1673,2 +1673,10 @@
   if (N.getOpcode() == ISD::ADD) {
+    // Power9 can fuse [addi, stdx], so even N can be represented as [r+i], we
+    // still force it to use [r+r]
+    if (Subtarget.getDarwinDirective() == PPC::DIR_PWR9 &&
+        N->getValueType(0) == MVT::i64) {
+      Index = N.getOperand(0);
+      Base = N.getOperand(1);
+      return true;
+    }
     if (isIntS16Immediate(N.getOperand(1), imm))
----------------
Two comments here:

1- This should be separated to a different patch. This patch is focused on scheduling the code, such that fusion opportunities are caught. This piece of code, is about generating code that has more fusion opportunities. These are separate issues that has to be addressed separately.

2- Are you saying that we should always prefer (addi + stdx) to (addi + std) because the former pair can be fused? If yes, that is incorrect. This can significantly increase register pressure and costs us way more than what we gain from fusing two insns.
 


https://reviews.llvm.org/D22194