[llvm] r275451 - [CodeGen] Refactor MachineMemOperand::Flags's target-specific flags.
Justin Lebar via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 14 13:11:25 PDT 2016
Because I used "constexpr" again. This is like the third time in a
week. :-/ Although interestingly I haven't seen emails from the
buildbots yet.
On Thu, Jul 14, 2016 at 1:10 PM, Kostya Serebryany <kcc at google.com> wrote:
> Looks like it broke the windows build.
>
> C:\b\slave\sanitizer-windows\llvm\lib\Target\AArch64\AArch64InstrInfo.cpp(32)
> : error C2143: syntax error : missing ';' before
> 'llvm::MachineMemOperand::Flags'
> C:\b\slave\sanitizer-windows\llvm\lib\Target\AArch64\AArch64InstrInfo.cpp(32)
> : error C4430: missing type specifier - int assumed. Note: C++ does not
> support default-int
>
>
> On Thu, Jul 14, 2016 at 11:15 AM, Justin Lebar via llvm-commits
> <llvm-commits at lists.llvm.org> wrote:
>>
>> Author: jlebar
>> Date: Thu Jul 14 13:15:20 2016
>> New Revision: 275451
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=275451&view=rev
>> Log:
>> [CodeGen] Refactor MachineMemOperand::Flags's target-specific flags.
>>
>> Summary:
>> Make the target-specific flags in MachineMemOperand::Flags real, bona
>> fide enum values. This simplifies users, prevents various constants
>> from going out of sync, and avoids the false sense of security provided
>> by declaring static members in classes and then forgetting to define
>> them inside of cpp files.
>>
>> Reviewers: MatzeB
>>
>> Subscribers: llvm-commits
>>
>> Differential Revision: https://reviews.llvm.org/D22372
>>
>> Modified:
>> llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
>> llvm/trunk/lib/CodeGen/MachineInstr.cpp
>> llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
>> llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.h
>>
>> Modified: llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h?rev=275451&r1=275450&r2=275451&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h (original)
>> +++ llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h Thu Jul 14
>> 13:15:20 2016
>> @@ -89,32 +89,27 @@ struct MachinePointerInfo {
>> ///
>> class MachineMemOperand {
>> public:
>> - // This is the number of bits we need to represent flags.
>> - static LLVM_CONSTEXPR unsigned MOMaxBits = 8;
>> -
>> - // Target hints allow target passes to annotate memory operations.
>> - static LLVM_CONSTEXPR unsigned MOTargetStartBit = 5;
>> - static LLVM_CONSTEXPR unsigned MOTargetNumBits = 3;
>> -
>> /// Flags values. These may be or'd together.
>> enum Flags : uint16_t {
>> // No flags set.
>> MONone = 0,
>> /// The memory access reads data.
>> - MOLoad = 1,
>> + MOLoad = 1u << 0,
>> /// The memory access writes data.
>> - MOStore = 2,
>> + MOStore = 1u << 1,
>> /// The memory access is volatile.
>> - MOVolatile = 4,
>> + MOVolatile = 1u << 2,
>> /// The memory access is non-temporal.
>> - MONonTemporal = 8,
>> + MONonTemporal = 1u << 3,
>> /// The memory access is invariant.
>> - MOInvariant = 16,
>> + MOInvariant = 1u << 4,
>>
>> - // Maximum MemOperandFlag value (inclusive).
>> - MOMaxFlag = (1 << MOMaxBits) - 1,
>> + // Reserved for use by target-specific passes.
>> + MOTargetFlag1 = 1u << 5,
>> + MOTargetFlag2 = 1u << 6,
>> + MOTargetFlag3 = 1u << 7,
>>
>> - LLVM_MARK_AS_BITMASK_ENUM(MOMaxFlag)
>> + LLVM_MARK_AS_BITMASK_ENUM(/* LargestFlag = */ MOTargetFlag3)
>> };
>>
>> private:
>>
>> Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=275451&r1=275450&r2=275451&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Thu Jul 14 13:15:20 2016
>> @@ -503,8 +503,6 @@ MachineMemOperand::MachineMemOperand(Mac
>> const MDNode *Ranges)
>> : PtrInfo(ptrinfo), Size(s), FlagVals(f), BaseAlignLog2(Log2_32(a) +
>> 1),
>> AAInfo(AAInfo), Ranges(Ranges) {
>> - assert(MOMaxFlag == (1 << MOMaxBits) - 1 &&
>> - "MOMaxFlag and MOMaxBits have fallen out of sync.");
>> assert((PtrInfo.V.isNull() || PtrInfo.V.is<const PseudoSourceValue*>()
>> ||
>> isa<PointerType>(PtrInfo.V.get<const Value*>()->getType())) &&
>> "invalid pointer value");
>>
>> Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=275451&r1=275450&r2=275451&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp (original)
>> +++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp Thu Jul 14 13:15:20
>> 2016
>> @@ -29,6 +29,9 @@ using namespace llvm;
>> #define GET_INSTRINFO_CTOR_DTOR
>> #include "AArch64GenInstrInfo.inc"
>>
>> +static constexpr MachineMemOperand::Flags MOSuppressPair =
>> + MachineMemOperand::MOTargetFlag1;
>> +
>> AArch64InstrInfo::AArch64InstrInfo(const AArch64Subtarget &STI)
>> : AArch64GenInstrInfo(AArch64::ADJCALLSTACKDOWN,
>> AArch64::ADJCALLSTACKUP),
>> RI(STI.getTargetTriple()), Subtarget(STI) {}
>> @@ -1449,27 +1452,16 @@ bool AArch64InstrInfo::isScaledAddr(cons
>>
>> /// Check all MachineMemOperands for a hint to suppress pairing.
>> bool AArch64InstrInfo::isLdStPairSuppressed(const MachineInstr &MI) const
>> {
>> - static_assert(MOSuppressPair < (1 <<
>> MachineMemOperand::MOTargetNumBits),
>> - "Too many target MO flags");
>> - for (auto *MM : MI.memoperands()) {
>> - if (MM->getFlags() &
>> - (MOSuppressPair << MachineMemOperand::MOTargetStartBit)) {
>> - return true;
>> - }
>> - }
>> - return false;
>> + return any_of(MI.memoperands(), [](MachineMemOperand *MMO) {
>> + return MMO->getFlags() & MOSuppressPair;
>> + });
>> }
>>
>> /// Set a flag on the first MachineMemOperand to suppress pairing.
>> void AArch64InstrInfo::suppressLdStPair(MachineInstr &MI) const {
>> if (MI.memoperands_empty())
>> return;
>> -
>> - static_assert(MOSuppressPair < (1 <<
>> MachineMemOperand::MOTargetNumBits),
>> - "Too many target MO flags");
>> - (*MI.memoperands_begin())
>> - ->setFlags(static_cast<MachineMemOperand::Flags>(
>> - MOSuppressPair << MachineMemOperand::MOTargetStartBit));
>> + (*MI.memoperands_begin())->setFlags(MOSuppressPair);
>> }
>>
>> bool AArch64InstrInfo::isUnscaledLdSt(unsigned Opc) const {
>>
>> Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.h
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.h?rev=275451&r1=275450&r2=275451&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.h (original)
>> +++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.h Thu Jul 14 13:15:20
>> 2016
>> @@ -28,12 +28,6 @@ class AArch64Subtarget;
>> class AArch64TargetMachine;
>>
>> class AArch64InstrInfo : public AArch64GenInstrInfo {
>> - // Reserve bits in the MachineMemOperand target hint flags, starting at
>> 1.
>> - // They will be shifted into MOTargetHintStart when accessed.
>> - enum TargetMemOperandFlags {
>> - MOSuppressPair = 1
>> - };
>> -
>> const AArch64RegisterInfo RI;
>> const AArch64Subtarget &Subtarget;
>>
>>
>>
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