[llvm] r275302 - add more tests for zexty xor sandwiches

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed Jul 13 13:58:55 2016
New Revision: 275302

URL: http://llvm.org/viewvc/llvm-project?rev=275302&view=rev
Log:
add more tests for zexty xor sandwiches

...mmm sandwiches

Modified:
    llvm/trunk/test/Transforms/InstCombine/xor.ll
    llvm/trunk/test/Transforms/InstCombine/zext.ll

Modified: llvm/trunk/test/Transforms/InstCombine/xor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/xor.ll?rev=275302&r1=275301&r2=275302&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/xor.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/xor.ll Wed Jul 13 13:58:55 2016
@@ -256,6 +256,18 @@ define i32 @fold_zext_xor_sandwich(i1 %X
   ret i32 %Q
 }
 
+define <2 x i32> @fold_zext_xor_sandwich_vec(<2 x i1> %X) {
+; CHECK-LABEL: @fold_zext_xor_sandwich_vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = zext <2 x i1> %X to <2 x i32>
+; CHECK-NEXT:    [[Q:%.*]] = xor <2 x i32> [[TMP1]], <i32 3, i32 3>
+; CHECK-NEXT:    ret <2 x i32> [[Q]]
+;
+  %Y = xor <2 x i1> %X, <i1 true, i1 true>
+  %Z = zext <2 x i1> %Y to <2 x i32>
+  %Q = xor <2 x i32> %Z, <i32 2, i32 2>
+  ret <2 x i32> %Q
+}
+
 define i1 @test23(i32 %a, i32 %b) {
 ; CHECK-LABEL: @test23(
 ; CHECK-NEXT:    [[T4:%.*]] = icmp eq i32 %b, 0

Modified: llvm/trunk/test/Transforms/InstCombine/zext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/zext.ll?rev=275302&r1=275301&r2=275302&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/zext.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/zext.ll Wed Jul 13 13:58:55 2016
@@ -46,3 +46,30 @@ define <2 x i64> @test4(<2 x i64> %A) {
   ret <2 x i64> %zext
 }
 
+; FIXME: If the xor was done in the smaller type, the back-to-back zexts would get combined.
+
+define i64 @fold_xor_zext_sandwich(i1 %a) {
+; CHECK-LABEL: @fold_xor_zext_sandwich(
+; CHECK-NEXT:    [[ZEXT1:%.*]] = zext i1 %a to i32
+; CHECK-NEXT:    [[XOR:%.*]] = xor i32 [[ZEXT1]], 1
+; CHECK-NEXT:    [[ZEXT2:%.*]] = zext i32 [[XOR]] to i64
+; CHECK-NEXT:    ret i64 [[ZEXT2]]
+;
+  %zext1 = zext i1 %a to i32
+  %xor = xor i32 %zext1, 1
+  %zext2 = zext i32 %xor to i64
+  ret i64 %zext2
+}
+
+define <2 x i64> @fold_xor_zext_sandwich_vec(<2 x i1> %a) {
+; CHECK-LABEL: @fold_xor_zext_sandwich_vec(
+; CHECK-NEXT:    [[ZEXT1:%.*]] = zext <2 x i1> %a to <2 x i64>
+; CHECK-NEXT:    [[XOR:%.*]] = xor <2 x i64> [[ZEXT1]], <i64 1, i64 1>
+; CHECK-NEXT:    ret <2 x i64> [[XOR]]
+;
+  %zext1 = zext <2 x i1> %a to <2 x i32>
+  %xor = xor <2 x i32> %zext1, <i32 1, i32 1>
+  %zext2 = zext <2 x i32> %xor to <2 x i64>
+  ret <2 x i64> %zext2
+}
+