[PATCH] D22210: AMDGPU: Treat texture gather instructions more like other MIMG instructions

Nicolai Hähnle via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 11 12:00:23 PDT 2016


nhaehnle added inline comments.

================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:3136
@@ -3135,2 +3135,3 @@
 
-  if (TII->isMIMG(Opcode) && !TII->get(Opcode).mayStore())
+  if (TII->isMIMG(Opcode) && TII->get(Opcode).hasPostISelHook() &&
+      !TII->get(Opcode).mayStore())
----------------
arsenm wrote:
> I don't understand why the check for hasPostISelHook is here. It shouldn't be a relevant property to check here
What we really want to check is whether the MIMG instructions' dmask has the default treatment (i.e. bitfield of returned components) as opposed to the special gather4 treatment.

For MIMG instructions, this coincides precisely with the hasPostISelHook, because fixing up the dmask is precisely what the PostISelHook is used for.

I could add an entry to the TSFlags for this bit, though I didn't do it because the information is redundant. Would you prefer the TSFlags solution?


http://reviews.llvm.org/D22210





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