[llvm] r275054 - [AMDGPU][llvm-mc] Quickfix for r272748 to enable labels in branch instructions.

[Artem Tamazov via llvm-commits]

Author: artem.tamazov
Date: Mon Jul 11 07:07:18 2016
New Revision: 275054

URL: http://llvm.org/viewvc/llvm-project?rev=275054&view=rev
Log:
[AMDGPU][llvm-mc] Quickfix for r272748 to enable labels in branch instructions.

Fixes issue mentioned at:
  https://github.com/RadeonOpenCompute/LLVM-AMDGPU-Assembler-Extra/issues/13.
Lit tests added.

Differential Revision: http://reviews.llvm.org/D22133

Added:
    llvm/trunk/test/MC/AMDGPU/labels-branch.s
Modified:
    llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp?rev=275054&r1=275053&r2=275054&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp Mon Jul 11 07:07:18 2016
@@ -2782,6 +2782,8 @@ unsigned AMDGPUAsmParser::validateTarget
     // name of the expression is not a valid token, the match will fail,
     // so we need to handle it here.
     return Operand.isSSrc32() ? Match_Success : Match_InvalidOperand;
+  case MCK_SoppBrTarget:
+    return Operand.isSoppBrTarget() ? Match_Success : Match_InvalidOperand;
   default: return Match_InvalidOperand;
   }
 }

Added: llvm/trunk/test/MC/AMDGPU/labels-branch.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/labels-branch.s?rev=275054&view=auto
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/labels-branch.s (added)
+++ llvm/trunk/test/MC/AMDGPU/labels-branch.s Mon Jul 11 07:07:18 2016
@@ -0,0 +1,17 @@
+// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
+
+loop_start:
+s_branch loop_start
+// VI: s_branch loop_start ; encoding: [A,A,0x82,0xbf]
+// VI-NEXT: ;   fixup A - offset: 0, value: loop_start, kind: fixup_si_sopp_br
+
+s_branch loop_end
+// VI: s_branch loop_end ; encoding: [A,A,0x82,0xbf]
+// VI-NEXT: ;   fixup A - offset: 0, value: loop_end, kind: fixup_si_sopp_br
+loop_end:
+
+s_branch gds
+// VI: s_branch gds ; encoding: [A,A,0x82,0xbf]
+// VI-NEXT: ;   fixup A - offset: 0, value: gds, kind: fixup_si_sopp_br
+gds:
+  s_nop 0