[PATCH] D19694: [LV] Allow interleaved accesses in loops with predicated blocks

[silviu.baranga@arm.com via llvm-commits]

sbaranga added inline comments.

================
Comment at: lib/Transforms/Vectorize/LoopVectorize.cpp:5438
@@ +5437,3 @@
+      auto *BlockB = B->getParent();
+      if (BlockA != BlockB && (isPredicated(BlockA) || isPredicated(BlockB)))
+        continue;
----------------
mssimpso wrote:
> sbaranga wrote:
> > Could we also have a test where all the accesses in a group are predicated and in the same block? In this case would all the predicated accesses be scalarized as well? (there might be some issues with out of bounds accesses from the wide load/store and the scalar epilogue if that's not the case)
> > 
> Yes, I wanted a test case like that, but I haven't been able to produce one that the vectorizer likes. It complains about being unable to if-convert the block I believe. I can look into this further, but currently I think we are limited to one store per predicated block. In which case, yes, we would always scalarize.
Ok, makes sense.

Maybe we can remove the BlockA != BlockB condition for now and handle this case in a separate change when we can if-convert the block?


http://reviews.llvm.org/D19694