[llvm] r274855 - Do not expand SDIV when compiling for minimum code size

[Sjoerd Meijer via llvm-commits]

Author: sjoerdmeijer
Date: Fri Jul  8 10:32:01 2016
New Revision: 274855

URL: http://llvm.org/viewvc/llvm-project?rev=274855&view=rev
Log:
Do not expand SDIV when compiling for minimum code size

Differential Revision: http://reviews.llvm.org/D22139

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/ARM/urem-opt-size.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=274855&r1=274854&r2=274855&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Jul  8 10:32:01 2016
@@ -14475,6 +14475,11 @@ SDValue DAGCombiner::SimplifySetCC(EVT V
 /// by a magic number.
 /// Ref: "Hacker's Delight" or "The PowerPC Compiler Writer's Guide".
 SDValue DAGCombiner::BuildSDIV(SDNode *N) {
+  // when optimising for minimum size, we don't want to expand a div to a mul
+  // and a shift.
+  if (DAG.getMachineFunction().getFunction()->optForMinSize())
+    return SDValue();
+
   ConstantSDNode *C = isConstOrConstSplat(N->getOperand(1));
   if (!C)
     return SDValue();

Modified: llvm/trunk/test/CodeGen/ARM/urem-opt-size.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/urem-opt-size.ll?rev=274855&r1=274854&r2=274855&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/urem-opt-size.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/urem-opt-size.ll Fri Jul  8 10:32:01 2016
@@ -1,5 +1,5 @@
-; When optimising for minimum size, we don't want to expand a udiv to a mul
-; and a shift sequence. As a result, the urem instruction will not be
+; When optimising for minimum size, we don't want to expand a div to a mul
+; and a shift sequence. As a result, the urem instruction e.g. will not be
 ; expanded to a sequence of umull, lsrs, muls and sub instructions, but
 ; just a call to __aeabi_uidivmod.
 ;
@@ -8,9 +8,29 @@
 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
 target triple = "thumbv7m-arm-none-eabi"
 
-define i32 @foo() local_unnamed_addr #0 {
+define i32 @foo1() local_unnamed_addr #0 {
 entry:
-; CHECK-LABEL: foo:
+; CHECK-LABEL: foo1:
+; CHECK:__aeabi_idiv
+; CHECK-NOT: smmul
+  %call = tail call i32 bitcast (i32 (...)* @GetValue to i32 ()*)()
+  %div = sdiv i32 %call, 1000000
+  ret i32 %div
+}
+
+define i32 @foo2() local_unnamed_addr #0 {
+entry:
+; CHECK-LABEL: foo2:
+; CHECK: __aeabi_uidiv
+; CHECK-NOT: umull
+  %call = tail call i32 bitcast (i32 (...)* @GetValue to i32 ()*)()
+  %div = udiv i32 %call, 1000000
+  ret i32 %div
+}
+
+define i32 @foo3() local_unnamed_addr #0 {
+entry:
+; CHECK-LABEL: foo3:
 ; CHECK: __aeabi_uidivmod
 ; CHECK-NOT: umull
   %call = tail call i32 bitcast (i32 (...)* @GetValue to i32 ()*)()