[PATCH] D21935: Add TLI.allowsMisalignedMemoryAccesses to LoadStoreVectorizer

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 7 13:54:15 PDT 2016

arsenm added inline comments.

Comment at: test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores.ll:505
@@ -504,4 +504,3 @@
 ; CHECK-LABEL: @merge_local_store_2_constants_i32_align_2
-; CHECK: store i32
-; CHECK: store i32
+; CHECK: store <2 x i32> <i32 456, i32 123>, <2 x i32> addrspace(3)* %1, align 2
 define void @merge_local_store_2_constants_i32_align_2(i32 addrspace(3)* %out) #0 {
asbirlea wrote:
> This is no longer vectorized with the above changes. I will update it with the other tests.
I recently enabled misaligned access depending on the triple, so this should probably be vectorized?


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