[PATCH] D20474: when calculating RegUsages, ignore instructions which are uniformed after vectorization

[Wei Mi via llvm-commits]

wmi updated this revision to Diff 63026.
wmi added a comment.
Herald added a subscriber: nemanjai.

Extract the major part of collectLoopUniforms into a helper func getDependentClosure so it can be reused by collectValuesToIgnore. For collectLoopUniforms, only loop compare and consecutive ptrs of load/store will be the seed uniform instructions in the WorkList.
For collectValuesToIgnore, loop compare, consecutive ptrs, non-gather/scatter and non-consecutive ptrs will be the seed non-vector instructions in the Worklist.


Repository:
  rL LLVM

http://reviews.llvm.org/D20474

Files:
  lib/Transforms/Vectorize/LoopVectorize.cpp
  test/Transforms/LoopVectorize/PowerPC/vsx-tsvc-s173.ll
  test/Transforms/LoopVectorize/X86/reg-usage.ll
  test/Transforms/LoopVectorize/reverse_induction.ll
  test/Transforms/LoopVectorize/reverse_iter.ll

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