[PATCH] D22038: [X86] Transform zext+seteq+cmp into shr+lzcnt on btver2 architecture.

[pierre gousseau via llvm-commits]

pgousseau created this revision.
pgousseau added reviewers: qcolombet, RKSimon, spatel, andreadb.
pgousseau added a subscriber: llvm-commits.

Hi All,

I would like to propose a change to turn zext+seteq+cmp into shr+lzcnt.
This optimisation is beneficial on Jaguar architecture only, where the lzcnt has a good reciprocal throughput.
Other architectures such as Intel's Haswell/Broadwell or AMD's Bulldozer/PileDriver do not benefit from it.
For this reason the change also add a "HasFastLZCNT" feature which gets enabled for Jaguar.

http://reviews.llvm.org/D22038

Files:
  lib/Target/X86/X86.td
  lib/Target/X86/X86InstrInfo.td
  lib/Target/X86/X86InstrShiftRotate.td
  lib/Target/X86/X86Subtarget.cpp
  lib/Target/X86/X86Subtarget.h
  test/CodeGen/X86/lzcnt-zext-cmp.ll

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