[PATCH] D22038: [X86] Transform zext+seteq+cmp into shr+lzcnt on btver2 architecture.
pierre gousseau via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 6 03:08:41 PDT 2016
pgousseau created this revision.
pgousseau added reviewers: qcolombet, RKSimon, spatel, andreadb.
pgousseau added a subscriber: llvm-commits.
I would like to propose a change to turn zext+seteq+cmp into shr+lzcnt.
This optimisation is beneficial on Jaguar architecture only, where the lzcnt has a good reciprocal throughput.
Other architectures such as Intel's Haswell/Broadwell or AMD's Bulldozer/PileDriver do not benefit from it.
For this reason the change also add a "HasFastLZCNT" feature which gets enabled for Jaguar.
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