[llvm] r274517 - AMDGPU/R600: Add indentation to VTX and TEX fetch asm strings

Jan Vesely via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 4 12:45:00 PDT 2016


Author: jvesely
Date: Mon Jul  4 14:45:00 2016
New Revision: 274517

URL: http://llvm.org/viewvc/llvm-project?rev=274517&view=rev
Log:
AMDGPU/R600: Add indentation to VTX and TEX fetch asm strings

These are printed as part of Fetch clauses.

Differential Revision: http://reviews.llvm.org/D21730

Modified:
    llvm/trunk/lib/Target/AMDGPU/R600Instructions.td

Modified: llvm/trunk/lib/Target/AMDGPU/R600Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/R600Instructions.td?rev=274517&r1=274516&r2=274517&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/R600Instructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/R600Instructions.td Mon Jul  4 14:45:00 2016
@@ -284,7 +284,7 @@ class EG_CF_RAT <bits <8> cfinst, bits <
 }
 
 class VTX_READ <string name, bits<8> buffer_id, dag outs, list<dag> pattern>
-    : InstR600ISA <outs, (ins MEMxi:$src_gpr), name, pattern>,
+    : InstR600ISA <outs, (ins MEMxi:$src_gpr), !strconcat("  ", name), pattern>,
       VTX_WORD1_GPR {
 
   // Static fields
@@ -860,7 +860,7 @@ class R600_TEX <bits<11> inst, string op
           i32imm:$RESOURCE_ID, i32imm:$SAMPLER_ID,
           CT:$COORD_TYPE_X, CT:$COORD_TYPE_Y, CT:$COORD_TYPE_Z,
           CT:$COORD_TYPE_W),
-          !strconcat(opName,
+          !strconcat("  ", opName,
           " $DST_GPR.$DST_SEL_X$DST_SEL_Y$DST_SEL_Z$DST_SEL_W, "
           "$SRC_GPR.$srcx$srcy$srcz$srcw "
           "RID:$RESOURCE_ID SID:$SAMPLER_ID "




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