[PATCH] D21854: Remove AND mask of bottom 6 bits when result is used for SystemZ shift/rotate

[Ulrich Weigand via llvm-commits]

uweigand added a comment.

Looks good in general.  However, it seems you missed the recent refactoring to the PerformDAGCombine routine (rev. 274191), so your patch won't apply.  Please update to current mainline (your code should now go into a subroutine like combineShift).

As further enhancement I'm wondering if it might be useful to tweak the ANDed constant even if the AND cannot be optimized away completely.  Not sure if that really makes a difference to real-world code though.


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Comment at: lib/Target/SystemZ/SystemZISelLowering.cpp:5064
@@ +5063,3 @@
+    SDValue N1 = N->getOperand(1);
+    if (N1.hasOneUse() && N1.getOpcode() == ISD::AND) {
+      auto *AndMask = dyn_cast<ConstantSDNode>(N1.getOperand(1));
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In principle it ought to be possible to do that optimization even if there are multiple uses of the AND result (the AND would still stay there, just not used for the shift).


http://reviews.llvm.org/D21854