[PATCH] D20907: [IfConversion] Bugfix: don't add Undef flag on use if reg is live.

Quentin Colombet via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 30 15:06:37 PDT 2016


> On Jun 29, 2016, at 9:10 AM, Jonas Paulsson <paulsson at linux.vnet.ibm.com> wrote:
> 
> jonpa added a comment.
> 
> Patch reverted by Peter Collingbourne, due to https://llvm.org/bugs/show_bug.cgi?id=28295.
> 
> I tried Peters test case, and this is what happened:
> 
>  BB#9: derived from LLVM BB %if.end5
>      Live Ins: %R4 %R5 %R8 %R10 %R11
>      Predecessors according to CFG: BB#7
>  ...
>  	%R0<def> = tMOVr %R9, pred:14, pred:%noreg
>  	tBL pred:14, pred:%noreg, <ga:@_ZN1CC1Ev>, <regmask %LR %D8 %D9 %D10 %D11 %D12 %D13 %D14 %D15 %Q4 %Q5 %Q6 %Q7 %R0 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %S16 %S17 %S18 %S19 %S20 %S21 %S22 %S23 %S24 %S25 %S26 %S27 %S28 %S29 %S30 %S31 %D8_D10 %D9_D11 %D10_D12 %D11_D13 %D12_D14 %D13_D15 %Q4_Q5 %Q5_Q6 %Q6_Q7 %Q4_Q5_Q6_Q7 %R4_R5 %R6_R7 %R8_R9 %R10_R11 %D8_D9_D10 %D9_D10_D11 %D10_D11_D12 %D11_D12_D13 %D12_D13_D14 %D13_D14_D15 %D8_D10_D12 %D9_D11_D13 %D10_D12_D14 %D11_D13_D15 %D8_D10_D12_D14 %D9_D11_D13_D15 %D9_D10 %D11_D12 %D13_D14 %D9_D10_D11_D12 %D11_D12_D13_D14>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %SP<imp-def>
>  	tBL pred:14, pred:%noreg, <ga:@_ZN1CanE1A>, <regmask %LR %D8 %D9 %D10 %D11 %D12 %D13 %D14 %D15 %Q4 %Q5 %Q6 %Q7 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %S16 %S17 %S18 %S19 %S20 %S21 %S22 %S23 %S24 %S25 %S26 %S27 %S28 %S29 %S30 %S31 %D8_D10 %D9_D11 %D10_D12 %D11_D13 %D12_D14 %D13_D15 %Q4_Q5 %Q5_Q6 %Q6_Q7 %Q4_Q5_Q6_Q7 %R4_R5 %R6_R7 %R8_R9 %R10_R11 %D8_D9_D10 %D9_D10_D11 %D10_D11_D12 %D11_D12_D13 %D12_D13_D14 %D13_D14_D15 %D8_D10_D12 %D9_D11_D13 %D10_D12_D14 %D11_D13_D15 %D8_D10_D12_D14 %D9_D11_D13_D15 %D9_D10 %D11_D12 %D13_D14 %D9_D10_D11_D12 %D11_D12_D13_D14>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %SP<imp-def>
>  	t2CMPri %R8<kill>, 0, pred:14, pred:%noreg, %CPSR<imp-def>
> 
>>>> 	%R0<def> = tMOVr %R11<kill>, pred:1, pred:%CPSR, %R0<imp-use>
> 
>  ...
> 
>      Successors according to CFG: BB#10(?%)
> 
>  *** Bad machine code: Using an undefined physical register ***
>  - function:    _ZN1F5m_fn2EP1DPNS_18ClientCallBehaviorE
>  - basic block: BB#9 if.end5 (0x9443838)
>  - instruction: %R0<def> = tMOVr
>  - operand 4:   %R0<imp-use>
> 
> IfConversion::UpdatePredRedefs() has added the %R0<imp-use> operand to the tMOVr (without patch there would also have been an undef flag).
> The second tBL does not include %R0 in the regmask, which should mean a value is returned in %R0, right? 

Returned, not necessary, but clobbered, yes.

> This should then mean that %R0 *is* actually live, and that either the MachineVerifier should have noticed this due to the regmask (like LivePhysReg does),

No, what the MachineVerifier does not like is that tMOVr uses (implicitly) R0, whereas it is not defined (you did not show defs of R0 before tMOVr and R0 is not live in of BB9).

To me the bug seems to come from the fact we thought it is live whereas it is not.

Could you check why we think it is live before tMOVr?

> or perhaps the tBL should have had an extra %R0<def>, in case that would generally be expected.
> 
> Any thoughts on this, anyone?
> 
> 
> http://reviews.llvm.org/D20907
> 
> 
> 



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