[PATCH] D21835: [mips] Update the P5600 scheduler for isComplete = 1

Simon Dardis via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 29 03:20:41 PDT 2016


sdardis removed rL LLVM as the repository for this revision.
sdardis updated this revision to Diff 62199.
sdardis added a comment.

Remove repeated resource use for co-processor 0 instructions.


http://reviews.llvm.org/D21835

Files:
  lib/Target/Mips/MipsScheduleP5600.td

Index: lib/Target/Mips/MipsScheduleP5600.td
===================================================================
--- lib/Target/Mips/MipsScheduleP5600.td
+++ lib/Target/Mips/MipsScheduleP5600.td
@@ -73,7 +73,7 @@
 
 def : ItinRW<[P5600WriteJumpAndLink], [II_JAL, II_JALR, II_JALR_HB]>;
 
-def P5600COP0 : SchedWriteRes<[P5600IssueCTISTD, P5600CTISTD]>;
+def P5600COP0 : SchedWriteRes<[P5600IssueCTISTD]>;
 
 def : ItinRW<[P5600COP0], [II_TLBINV, II_TLBINVF, II_TLBP, II_TLBR, II_TLBWI,
                            II_TLBWR, II_MFC0, II_MTC0]>;


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