[PATCH] D21774: [X86] Transform setcc + movzbl into xorl + setcc

Michael Kuperstein via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 28 18:16:26 PDT 2016


mkuper added a comment.

http://reviews.llvm.org/D21822 looks really nice. It's missing some small things (anyext and zext to i64 need to be handled explicitly - on the MI level, they have already been lowered to a zext to i32), and the call to Select worries me (is it strictly necessary? We're supposed to always select bottom-up, right?), but other than that, I believe it works.

It does however expose some of the weirdness Dave was talking about, simply by virtue of happening early and thus having less predictable code at RA time.
For CodeGen/X86/legalize-shift-64.ll we will get:

  ...
  	movb	$32, %cl
  	testb	%cl, %cl
  	sete	%bl
  	movl	$0, %ecx
  	movb	%bl, %cl
  ...

The block the sete lives in happens to have two different MOV32r0 instructions, one for the sete, and another for an unrelated reason. One of them gets MachineCSE'd, and then regalloc has to remat a 0, and happens to remat it like this.


http://reviews.llvm.org/D21774





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