[lld] MIPS relocations in KSEG0

Simon Atanasyan via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 28 07:47:30 PDT 2016


Thanks for finding the bug. I will commit the fix soon.

On Tue, Jun 28, 2016 at 5:05 PM, Martin Pelikán
<llvm-commits at lists.llvm.org> wrote:
> The high bit in Val gets sign-extended, which then clobbers the
> J-instruction opcode in its top 6 bits.
>
> --- a/ELF/Target.cpp
> +++ b/ELF/Target.cpp
> @@ -1979,7 +1979,7 @@ void MipsTargetInfo<ELFT>::relocateOne(uint8_t
> *Loc, uint32_t Type,
>      write64<E>(Loc, Val);
>      break;
>    case R_MIPS_26:
> -    write32<E>(Loc, (read32<E>(Loc) & ~0x3ffffff) | (Val >> 2));
> +    write32<E>(Loc, (read32<E>(Loc) & ~0x3ffffff) | ((Val & 0x3ffffff) >> 2));
>      break;
>    case R_MIPS_GOT_DISP:
>    case R_MIPS_GOT_PAGE:

-- 
Simon Atanasyan


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