[PATCH] D21755: Refine the set of UniformAfterVectorization instructions

Wei Mi via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 27 10:59:30 PDT 2016

wmi created this revision.
wmi added reviewers: mkuper, hfinkel, jmolloy.
wmi added subscribers: llvm-commits, davidxl, mssimpso, test.
wmi set the repository for this revision to rL LLVM.
Herald added a subscriber: mzolotukhin.

For %0 in the loop below, it will have both a scalar version and a vector version after vectorization, and it shouldn't be added into uniform set. 

define void @test(i32* %a, i64 %n) {
  br label %for.body

  %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
  %0 = trunc i64 %i to i32
  %1 = getelementptr inbounds i32, i32* %a, i32 %0    ====> %0 used in uniform instruction.
  store i32 %0, i32* %1, align 4                                      ====> %0 used in non-uniform instruction.
  %i.next = add nuw nsw i64 %i, 1
  %cond = icmp eq i64 %i.next, %n
  br i1 %cond, label %for.end, label %for.body

  ret void

Before the patch all dependencies of conditional branch or consecutive ptrs will be added into uniform set. The patch changes that to: except seed uniform instructions (conditional branch and consecutive ptr instructions), dependencies to be added into uniform set should only be used by existing uniform instructions or intructions outside of current loop.

This patch uses parts in http://reviews.llvm.org/D21631 from mkuper. 




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