[PATCH] D21560: Relax the clearance calculating for breaking partial register dependency.

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 26 16:59:22 PDT 2016


spatel added inline comments.

================
Comment at: lib/Target/X86/X86InstrInfo.cpp:61-66
@@ -60,2 +60,8 @@
                  cl::init(false), cl::Hidden);
+static cl::opt<unsigned>
+PartialRegUpdateClearance("partial-reg-update-clearance",
+                          cl::desc("Clearance between two register writes "
+                                   "for inserting XOR to avoid partial "
+                                   "register update"),
+                          cl::init(64), cl::Hidden);
 
----------------
The option is used for partial reg clearance and undef reg clearance. It should have a more generic name and description, or we should have 2 independent variables. I'm fine with either way, but what the patch has in this version is misleading.

================
Comment at: lib/Target/X86/X86InstrInfo.cpp:5981
@@ -5974,5 +5980,3 @@
 
-  // If any of the preceding 16 instructions are reading Reg, insert a
-  // dependency breaking instruction.  The magic number is based on a few
-  // Nehalem experiments.
-  return 16;
+  // If any of the preceding 64 instructions are reading Reg, insert a
+  // dependency breaking instruction, which is inexpensive and is likely to
----------------
Don't hard-code the comment to any specific value since it may change above.


http://reviews.llvm.org/D21560





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