[llvm] r273702 - [InstCombine] consolidate commutation variants of matchSelectFromAndOr() in one place; NFCI
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 24 11:26:03 PDT 2016
Author: spatel
Date: Fri Jun 24 13:26:02 2016
New Revision: 273702
URL: http://llvm.org/viewvc/llvm-project?rev=273702&view=rev
Log:
[InstCombine] consolidate commutation variants of matchSelectFromAndOr() in one place; NFCI
By putting all the possible commutations together, we simplify the code.
Note that this is NFCI, but I'm adding tests that actually exercise each
commutation pattern because we don't have this anywhere else.
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/trunk/test/Transforms/InstCombine/logical-select.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=273702&r1=273701&r2=273702&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Fri Jun 24 13:26:02 2016
@@ -1628,26 +1628,18 @@ Instruction *InstCombiner::MatchBSwap(Bi
return LastInst;
}
-/// We have an expression of the form (A&C)|(B&D). Check if A is (cond?-1:0)
-/// and either B or D is ~(cond?-1,0) or (cond?0,-1), then we can simplify this
-/// expression to "cond ? C : D or B".
-static Instruction *matchSelectFromAndOr(Value *A, Value *B, Value *C, Value *D,
+/// We have an expression of the form (A & C) | (B & D). If A is (Cond?-1:0)
+/// and B is ~(Cond?-1,0), then simplify this expression to "Cond ? C : D".
+static Instruction *matchSelectFromAndOr(Value *A, Value *C, Value *B, Value *D,
InstCombiner::BuilderTy &Builder) {
// If A is not a select of -1/0, this cannot match.
Value *Cond = nullptr;
if (match(A, m_SExt(m_Value(Cond))) &&
Cond->getType()->getScalarType()->isIntegerTy(1)) {
- // ((cond ? -1:0) & C) | (B & (cond ? 0:-1)) -> cond ? C : B.
- if (match(D, m_Not(m_SExt(m_Specific(Cond)))))
- return SelectInst::Create(Cond, C, B);
- if (match(D, m_SExt(m_Not(m_Specific(Cond)))))
- return SelectInst::Create(Cond, C, B);
-
// ((cond ? -1:0) & C) | ((cond ? 0:-1) & D) -> cond ? C : D.
- if (match(B, m_Not(m_SExt(m_Specific(Cond)))))
- return SelectInst::Create(Cond, C, D);
- if (match(B, m_SExt(m_Not(m_Specific(Cond)))))
+ if (match(B, m_CombineOr(m_Not(m_SExt(m_Specific(Cond))),
+ m_SExt(m_Not(m_Specific(Cond))))))
return SelectInst::Create(Cond, C, D);
}
@@ -1662,15 +1654,6 @@ static Instruction *matchSelectFromAndOr
Type *SrcType = cast<BitCastInst>(A)->getSrcTy();
- // ((bc Cond) & C) | (B & (bc ~Cond)) --> bc (select Cond, (bc C), (bc B))
- if (match(D, m_CombineOr(m_BitCast(m_Not(m_SExt(m_Specific(Cond)))),
- m_BitCast(m_SExt(m_Not(m_Specific(Cond))))))) {
- Value *BitcastC = Builder.CreateBitCast(C, SrcType);
- Value *BitcastB = Builder.CreateBitCast(B, SrcType);
- Value *Select = Builder.CreateSelect(Cond, BitcastC, BitcastB);
- return CastInst::Create(Instruction::BitCast, Select, A->getType());
- }
-
// ((bc Cond) & C) | ((bc ~Cond) & D) --> bc (select Cond, (bc C), (bc D))
if (match(B, m_CombineOr(m_BitCast(m_Not(m_SExt(m_Specific(Cond)))),
m_BitCast(m_SExt(m_Not(m_Specific(Cond))))))) {
@@ -2276,14 +2259,22 @@ Instruction *InstCombiner::visitOr(Binar
}
}
- // (A & (C0?-1:0)) | (B & ~(C0?-1:0)) -> C0 ? A : B, and commuted variants.
- if (Instruction *Match = matchSelectFromAndOr(A, B, C, D, *Builder))
+ // (Cond & C) | (~Cond & D) -> Cond ? C : D, and commuted variants.
+ if (Instruction *Match = matchSelectFromAndOr(A, C, B, D, *Builder))
+ return Match;
+ if (Instruction *Match = matchSelectFromAndOr(A, C, D, B, *Builder))
+ return Match;
+ if (Instruction *Match = matchSelectFromAndOr(C, A, B, D, *Builder))
+ return Match;
+ if (Instruction *Match = matchSelectFromAndOr(C, A, D, B, *Builder))
+ return Match;
+ if (Instruction *Match = matchSelectFromAndOr(B, D, A, C, *Builder))
return Match;
- if (Instruction *Match = matchSelectFromAndOr(B, A, D, C, *Builder))
+ if (Instruction *Match = matchSelectFromAndOr(B, D, C, A, *Builder))
return Match;
- if (Instruction *Match = matchSelectFromAndOr(C, B, A, D, *Builder))
+ if (Instruction *Match = matchSelectFromAndOr(D, B, A, C, *Builder))
return Match;
- if (Instruction *Match = matchSelectFromAndOr(D, A, B, C, *Builder))
+ if (Instruction *Match = matchSelectFromAndOr(D, B, C, A, *Builder))
return Match;
// ((A&~B)|(~A&B)) -> A^B
Modified: llvm/trunk/test/Transforms/InstCombine/logical-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/logical-select.ll?rev=273702&r1=273701&r2=273702&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/logical-select.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/logical-select.ll Fri Jun 24 13:26:02 2016
@@ -77,79 +77,188 @@ define i32 @par(i32 %a, i32 %b, i32 %c,
ret i32 %t3
}
-; In the following tests, verify that a bitcast doesn't get in the way
-; of a select transform. These bitcasts are common in SSE/AVX and possibly
+; In the following tests (8 commutation variants), verify that a bitcast doesn't get
+; in the way of a select transform. These bitcasts are common in SSE/AVX and possibly
; other vector code because of canonicalization to i64 elements for vectors.
-define <2 x i64> @bitcast_select(<4 x i1> %cmp, <2 x i64> %a, <2 x i64> %b) {
-; CHECK-LABEL: @bitcast_select(
-; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> %a to <4 x i32>
-; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> %b to <4 x i32>
+; The fptosi instructions are included to avoid commutation canonicalization based on
+; operator weight. Using another cast operator ensures that both operands of all logic
+; ops are equally weighted, and this ensures that we're testing all commutation
+; possibilities.
+
+define <2 x i64> @bitcast_select_swap0(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
+; CHECK-LABEL: @bitcast_select_swap0(
+; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
+; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[OR]]
;
+ %sia = fptosi <2 x double> %a to <2 x i64>
+ %sib = fptosi <2 x double> %b to <2 x i64>
%sext = sext <4 x i1> %cmp to <4 x i32>
- %t2 = bitcast <4 x i32> %sext to <2 x i64>
- %and = and <2 x i64> %t2, %a
+ %bc1 = bitcast <4 x i32> %sext to <2 x i64>
+ %and1 = and <2 x i64> %bc1, %sia
%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
- %neg2 = bitcast <4 x i32> %neg to <2 x i64>
- %and2 = and <2 x i64> %neg2, %b
- %or = or <2 x i64> %and, %and2
+ %bc2 = bitcast <4 x i32> %neg to <2 x i64>
+ %and2 = and <2 x i64> %bc2, %sib
+ %or = or <2 x i64> %and1, %and2
ret <2 x i64> %or
}
-define <2 x i64> @bitcast_select_swap_or_ops(<4 x i1> %cmp, <2 x i64> %a, <2 x i64> %b) {
-; CHECK-LABEL: @bitcast_select_swap_or_ops(
-; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> %a to <4 x i32>
-; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> %b to <4 x i32>
+define <2 x i64> @bitcast_select_swap1(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
+; CHECK-LABEL: @bitcast_select_swap1(
+; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
+; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[OR]]
;
+ %sia = fptosi <2 x double> %a to <2 x i64>
+ %sib = fptosi <2 x double> %b to <2 x i64>
%sext = sext <4 x i1> %cmp to <4 x i32>
- %t2 = bitcast <4 x i32> %sext to <2 x i64>
- %and = and <2 x i64> %t2, %a
+ %bc1 = bitcast <4 x i32> %sext to <2 x i64>
+ %and1 = and <2 x i64> %bc1, %sia
%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
- %neg2 = bitcast <4 x i32> %neg to <2 x i64>
- %and2 = and <2 x i64> %neg2, %b
- %or = or <2 x i64> %and2, %and
+ %bc2 = bitcast <4 x i32> %neg to <2 x i64>
+ %and2 = and <2 x i64> %bc2, %sib
+ %or = or <2 x i64> %and2, %and1
ret <2 x i64> %or
}
-define <2 x i64> @bitcast_select_swap_and_ops(<4 x i1> %cmp, <2 x i64> %a, <2 x i64> %b) {
-; CHECK-LABEL: @bitcast_select_swap_and_ops(
-; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> %a to <4 x i32>
-; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> %b to <4 x i32>
+define <2 x i64> @bitcast_select_swap2(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
+; CHECK-LABEL: @bitcast_select_swap2(
+; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
+; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[OR]]
;
+ %sia = fptosi <2 x double> %a to <2 x i64>
+ %sib = fptosi <2 x double> %b to <2 x i64>
%sext = sext <4 x i1> %cmp to <4 x i32>
- %t2 = bitcast <4 x i32> %sext to <2 x i64>
- %and = and <2 x i64> %t2, %a
+ %bc1 = bitcast <4 x i32> %sext to <2 x i64>
+ %and1 = and <2 x i64> %bc1, %sia
%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
- %neg2 = bitcast <4 x i32> %neg to <2 x i64>
- %and2 = and <2 x i64> %b, %neg2
- %or = or <2 x i64> %and, %and2
+ %bc2 = bitcast <4 x i32> %neg to <2 x i64>
+ %and2 = and <2 x i64> %sib, %bc2
+ %or = or <2 x i64> %and1, %and2
ret <2 x i64> %or
}
-define <2 x i64> @bitcast_select_swap_and_ops2(<4 x i1> %cmp, <2 x i64> %a, <2 x i64> %b) {
-; CHECK-LABEL: @bitcast_select_swap_and_ops2(
-; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> %a to <4 x i32>
-; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> %b to <4 x i32>
+define <2 x i64> @bitcast_select_swap3(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
+; CHECK-LABEL: @bitcast_select_swap3(
+; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
+; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[OR]]
;
+ %sia = fptosi <2 x double> %a to <2 x i64>
+ %sib = fptosi <2 x double> %b to <2 x i64>
%sext = sext <4 x i1> %cmp to <4 x i32>
- %t2 = bitcast <4 x i32> %sext to <2 x i64>
- %and = and <2 x i64> %a, %t2
+ %bc1 = bitcast <4 x i32> %sext to <2 x i64>
+ %and1 = and <2 x i64> %bc1, %sia
%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
- %neg2 = bitcast <4 x i32> %neg to <2 x i64>
- %and2 = and <2 x i64> %neg2, %b
- %or = or <2 x i64> %and, %and2
+ %bc2 = bitcast <4 x i32> %neg to <2 x i64>
+ %and2 = and <2 x i64> %sib, %bc2
+ %or = or <2 x i64> %and2, %and1
+ ret <2 x i64> %or
+}
+
+define <2 x i64> @bitcast_select_swap4(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
+; CHECK-LABEL: @bitcast_select_swap4(
+; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
+; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
+; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
+; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
+; CHECK-NEXT: ret <2 x i64> [[OR]]
+;
+ %sia = fptosi <2 x double> %a to <2 x i64>
+ %sib = fptosi <2 x double> %b to <2 x i64>
+ %sext = sext <4 x i1> %cmp to <4 x i32>
+ %bc1 = bitcast <4 x i32> %sext to <2 x i64>
+ %and1 = and <2 x i64> %sia, %bc1
+ %neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
+ %bc2 = bitcast <4 x i32> %neg to <2 x i64>
+ %and2 = and <2 x i64> %bc2, %sib
+ %or = or <2 x i64> %and1, %and2
+ ret <2 x i64> %or
+}
+
+define <2 x i64> @bitcast_select_swap5(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
+; CHECK-LABEL: @bitcast_select_swap5(
+; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
+; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
+; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
+; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
+; CHECK-NEXT: ret <2 x i64> [[OR]]
+;
+ %sia = fptosi <2 x double> %a to <2 x i64>
+ %sib = fptosi <2 x double> %b to <2 x i64>
+ %sext = sext <4 x i1> %cmp to <4 x i32>
+ %bc1 = bitcast <4 x i32> %sext to <2 x i64>
+ %and1 = and <2 x i64> %sia, %bc1
+ %neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
+ %bc2 = bitcast <4 x i32> %neg to <2 x i64>
+ %and2 = and <2 x i64> %bc2, %sib
+ %or = or <2 x i64> %and2, %and1
+ ret <2 x i64> %or
+}
+
+define <2 x i64> @bitcast_select_swap6(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
+; CHECK-LABEL: @bitcast_select_swap6(
+; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
+; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
+; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
+; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
+; CHECK-NEXT: ret <2 x i64> [[OR]]
+;
+ %sia = fptosi <2 x double> %a to <2 x i64>
+ %sib = fptosi <2 x double> %b to <2 x i64>
+ %sext = sext <4 x i1> %cmp to <4 x i32>
+ %bc1 = bitcast <4 x i32> %sext to <2 x i64>
+ %and1 = and <2 x i64> %sia, %bc1
+ %neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
+ %bc2 = bitcast <4 x i32> %neg to <2 x i64>
+ %and2 = and <2 x i64> %sib, %bc2
+ %or = or <2 x i64> %and1, %and2
+ ret <2 x i64> %or
+}
+
+define <2 x i64> @bitcast_select_swap7(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
+; CHECK-LABEL: @bitcast_select_swap7(
+; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
+; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
+; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
+; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
+; CHECK-NEXT: ret <2 x i64> [[OR]]
+;
+ %sia = fptosi <2 x double> %a to <2 x i64>
+ %sib = fptosi <2 x double> %b to <2 x i64>
+ %sext = sext <4 x i1> %cmp to <4 x i32>
+ %bc1 = bitcast <4 x i32> %sext to <2 x i64>
+ %and1 = and <2 x i64> %sia, %bc1
+ %neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
+ %bc2 = bitcast <4 x i32> %neg to <2 x i64>
+ %and2 = and <2 x i64> %sib, %bc2
+ %or = or <2 x i64> %and2, %and1
ret <2 x i64> %or
}
More information about the llvm-commits
mailing list