[llvm] r273557 - [mips] Don't derive the default ABI from the CPU in the backend.
Daniel Sanders via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 23 05:42:55 PDT 2016
Author: dsanders
Date: Thu Jun 23 07:42:53 2016
New Revision: 273557
URL: http://llvm.org/viewvc/llvm-project?rev=273557&view=rev
Log:
[mips] Don't derive the default ABI from the CPU in the backend.
Summary:
The backend has no reason to behave like a driver and should generally do
as it's told (and error out if it can't) instead of trying to figure out
what the API user meant. The default ABI is still derived from the arch
component as a concession to backwards compatibility.
API-users that previously passed an explicit CPU and a triple that was
inconsistent with the CPU (e.g. mips-linux-gnu and mips64r2) may get a
different ABI to what they got before. However, it's expected that there
are no such users on the basis that CodeGen has been asserting that the
triple is consistent with the selected ABI for several releases. API-users
that were consistent or passed '' or 'generic' as the CPU will see no
difference.
Reviewers: sdardis, rafael
Subscribers: rafael, dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D21466
Modified:
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
llvm/trunk/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll
llvm/trunk/test/CodeGen/Mips/adjust-callstack-sp.ll
llvm/trunk/test/CodeGen/Mips/compactbranches/compact-branches.ll
llvm/trunk/test/CodeGen/Mips/elf_eflags.ll
llvm/trunk/test/CodeGen/Mips/fcmp.ll
llvm/trunk/test/CodeGen/Mips/interrupt-attr-64-error.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/add.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/and.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/lh_lhu.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/mul.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/not.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/or.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/sdiv.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/srem.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/udiv.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/urem.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/xor.ll
llvm/trunk/test/CodeGen/Mips/madd-msub.ll
llvm/trunk/test/CodeGen/Mips/mips64extins.ll
llvm/trunk/test/CodeGen/Mips/mips64r6/compatibility.ll
llvm/trunk/test/CodeGen/Mips/zeroreg.ll
llvm/trunk/test/MC/Mips/elf_eflags.s
llvm/trunk/test/MC/Mips/mips64/abiflags.s
llvm/trunk/test/MC/Mips/mips64r2/abi-bad.s
llvm/trunk/test/MC/Mips/mips64r2/abiflags.s
llvm/trunk/test/MC/Mips/mips64r3/abi-bad.s
llvm/trunk/test/MC/Mips/mips64r3/abiflags.s
llvm/trunk/test/MC/Mips/mips64r5/abi-bad.s
llvm/trunk/test/MC/Mips/mips64r5/abiflags.s
llvm/trunk/test/MC/Mips/mips_abi_flags_xx.s
llvm/trunk/test/MC/Mips/nooddspreg-cmdarg.s
llvm/trunk/test/MC/Mips/nooddspreg.s
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp Thu Jun 23 07:42:53 2016
@@ -58,34 +58,9 @@ MipsABIInfo MipsABIInfo::computeTargetAB
else if (!Options.getABIName().empty())
llvm_unreachable("Unknown ABI option for MIPS");
- // FIXME: This shares code with the selectMipsCPU routine that's
- // used and not shared in a couple of other places. This needs unifying
- // at some level.
- if (CPU.empty() || CPU == "generic") {
- if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel)
- CPU = "mips32";
- else
- CPU = "mips64";
- }
-
- return StringSwitch<MipsABIInfo>(CPU)
- .Case("mips1", MipsABIInfo::O32())
- .Case("mips2", MipsABIInfo::O32())
- .Case("mips32", MipsABIInfo::O32())
- .Case("mips32r2", MipsABIInfo::O32())
- .Case("mips32r3", MipsABIInfo::O32())
- .Case("mips32r5", MipsABIInfo::O32())
- .Case("mips32r6", MipsABIInfo::O32())
- .Case("mips3", MipsABIInfo::N64())
- .Case("mips4", MipsABIInfo::N64())
- .Case("mips5", MipsABIInfo::N64())
- .Case("mips64", MipsABIInfo::N64())
- .Case("mips64r2", MipsABIInfo::N64())
- .Case("mips64r3", MipsABIInfo::N64())
- .Case("mips64r5", MipsABIInfo::N64())
- .Case("mips64r6", MipsABIInfo::N64())
- .Case("octeon", MipsABIInfo::N64())
- .Default(MipsABIInfo::Unknown());
+ if (TT.getArch() == Triple::mips64 || TT.getArch() == Triple::mips64el)
+ return MipsABIInfo::N64();
+ return MipsABIInfo::O32();
}
unsigned MipsABIInfo::GetStackPtr() const {
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll Thu Jun 23 07:42:53 2016
@@ -1,8 +1,8 @@
; RUN: llc -march=mips -mcpu=mips2 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
-; RUN: llc -march=mips -mcpu=mips3 -O0 -relocation-model=pic \
+; RUN: llc -march=mips -mcpu=mips3 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
-; RUN: llc -march=mips -mcpu=mips4 -O0 -relocation-model=pic \
+; RUN: llc -march=mips -mcpu=mips4 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
@@ -10,13 +10,13 @@
; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
-; RUN: llc -march=mips -mcpu=mips64 -O0 -relocation-model=pic \
+; RUN: llc -march=mips -mcpu=mips64 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
-; RUN: llc -march=mips -mcpu=mips64r2 -O0 -relocation-model=pic \
+; RUN: llc -march=mips -mcpu=mips64r2 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
-; RUN: llc -march=mips -mcpu=mips64r3 -O0 -relocation-model=pic \
+; RUN: llc -march=mips -mcpu=mips64r3 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
-; RUN: llc -march=mips -mcpu=mips64r5 -O0 -relocation-model=pic \
+; RUN: llc -march=mips -mcpu=mips64r5 -O0 -relocation-model=pic -target-abi n64 \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s
Modified: llvm/trunk/test/CodeGen/Mips/adjust-callstack-sp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/adjust-callstack-sp.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/adjust-callstack-sp.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/adjust-callstack-sp.ll Thu Jun 23 07:42:53 2016
@@ -2,18 +2,18 @@
; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s -check-prefix=GP32
-; RUN: llc < %s -march=mips -mcpu=mips3 | FileCheck %s -check-prefix=GP64
-; RUN: llc < %s -march=mips -mcpu=mips64 | FileCheck %s -check-prefix=GP64
-; RUN: llc < %s -march=mips -mcpu=mips64r6 | FileCheck %s -check-prefix=GP64
+; RUN: llc < %s -march=mips -mcpu=mips3 -target-abi n64 | FileCheck %s -check-prefix=GP64
+; RUN: llc < %s -march=mips -mcpu=mips64 -target-abi n64 | FileCheck %s -check-prefix=GP64
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 | FileCheck %s -check-prefix=GP64
declare void @bar(i32*)
define void @foo(i32 %sz) {
; ALL-LABEL: foo:
- ; M16-NOT: addiu $sp, 0 # 16 bit inst
- ; GP32-NOT: addiu $sp, $sp, 0
- ; GP64-NOT: daddiu $sp, $sp, 0
+ ; M16-NOT: addiu $sp, 0 # 16 bit inst
+ ; GP32-NOT: addiu $sp, $sp, 0
+ ; GP64-NOT: daddiu $sp, $sp, 0
%a = alloca i32, i32 %sz
call void @bar(i32* %a)
ret void
Modified: llvm/trunk/test/CodeGen/Mips/compactbranches/compact-branches.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/compactbranches/compact-branches.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/compactbranches/compact-branches.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/compactbranches/compact-branches.ll Thu Jun 23 07:42:53 2016
@@ -1,5 +1,5 @@
; RUN: llc -march=mipsel -mcpu=mips32r6 -relocation-model=static -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=STATIC32
-; RUN: llc -march=mipsel -mcpu=mips64r6 -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=PIC
+; RUN: llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=PIC
; Function Attrs: nounwind
define void @l() {
Modified: llvm/trunk/test/CodeGen/Mips/elf_eflags.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/elf_eflags.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/elf_eflags.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/elf_eflags.ll Thu Jun 23 07:42:53 2016
@@ -23,13 +23,13 @@
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MICROMIPS %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MICROMIPS_PIC %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -target-abi n64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -target-abi n64 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64R2 %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 %s -o - | FileCheck -check-prefix=CHECK-LE64R2_PIC %s
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64R2 %s
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 %s -o - | FileCheck -check-prefix=CHECK-LE64R2_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s
Modified: llvm/trunk/test/CodeGen/Mips/fcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/fcmp.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/fcmp.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/fcmp.ll Thu Jun 23 07:42:53 2016
@@ -17,7 +17,7 @@
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MMR6 \
; RUN: -check-prefix=MM32R6
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \
+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MMR6 \
; RUN: -check-prefix=MM64R6
Modified: llvm/trunk/test/CodeGen/Mips/interrupt-attr-64-error.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/interrupt-attr-64-error.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/interrupt-attr-64-error.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/interrupt-attr-64-error.ll Thu Jun 23 07:42:53 2016
@@ -1,4 +1,4 @@
-; RUN: not llc -mcpu=mips64r6 -march=mipsel -relocation-model=static < %s 2>%t
+; RUN: not llc -mcpu=mips64r6 -march=mipsel -target-abi n64 -relocation-model=static < %s 2>%t
; RUN: FileCheck %s < %t
; CHECK: LLVM ERROR: "interrupt" attribute is only supported for the O32 ABI on MIPS32R2+ at the present time.
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/add.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/add.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/add.ll Thu Jun 23 07:42:53 2016
@@ -28,7 +28,7 @@
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -O2 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -O2 | FileCheck %s \
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -O2 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @add_i1(i1 signext %a, i1 signext %b) {
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/and.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/and.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/and.ll Thu Jun 23 07:42:53 2016
@@ -28,7 +28,7 @@
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64
define signext i1 @and_i1(i1 signext %a, i1 signext %b) {
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/lh_lhu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/lh_lhu.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/lh_lhu.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/lh_lhu.ll Thu Jun 23 07:42:53 2016
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips -relocation-model=pic | FileCheck %s
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s
@us = global i16 0, align 2
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/mul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/mul.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/mul.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/mul.ll Thu Jun 23 07:42:53 2016
@@ -26,7 +26,7 @@
; RUN: -check-prefix=MM32 -check-prefix=MM32R3
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=MM32 -check-prefix=MM32R6
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -target-abi n64 -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=64R6
define signext i1 @mul_i1(i1 signext %a, i1 signext %b) {
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/not.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/not.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/not.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/not.ll Thu Jun 23 07:42:53 2016
@@ -28,7 +28,7 @@
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64
define signext i1 @not_i1(i1 signext %a) {
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/or.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/or.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/or.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/or.ll Thu Jun 23 07:42:53 2016
@@ -28,7 +28,7 @@
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64
define signext i1 @or_i1(i1 signext %a, i1 signext %b) {
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/sdiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/sdiv.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/sdiv.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/sdiv.ll Thu Jun 23 07:42:53 2016
@@ -43,7 +43,7 @@
; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -target-abi n64 -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @sdiv_i1(i1 signext %a, i1 signext %b) {
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/srem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/srem.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/srem.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/srem.ll Thu Jun 23 07:42:53 2016
@@ -43,7 +43,7 @@
; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @srem_i1(i1 signext %a, i1 signext %b) {
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/udiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/udiv.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/udiv.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/udiv.ll Thu Jun 23 07:42:53 2016
@@ -30,7 +30,7 @@
; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define zeroext i1 @udiv_i1(i1 zeroext %a, i1 zeroext %b) {
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/urem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/urem.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/urem.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/urem.ll Thu Jun 23 07:42:53 2016
@@ -43,7 +43,7 @@
; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @urem_i1(i1 signext %a, i1 signext %b) {
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/xor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/xor.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/xor.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/xor.ll Thu Jun 23 07:42:53 2016
@@ -28,7 +28,7 @@
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM32
-; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=MM -check-prefix=MM64
define signext i1 @xor_i1(i1 signext %a, i1 signext %b) {
Modified: llvm/trunk/test/CodeGen/Mips/madd-msub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/madd-msub.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/madd-msub.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/madd-msub.ll Thu Jun 23 07:42:53 2016
@@ -2,9 +2,9 @@
; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=32
; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=32R6
; RUN: llc -march=mips -mcpu=mips32 -mattr=dsp < %s | FileCheck %s -check-prefix=DSP
-; RUN: llc -march=mips -mcpu=mips64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64
-; RUN: llc -march=mips -mcpu=mips64r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64
-; RUN: llc -march=mips -mcpu=mips64r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64R6
+; RUN: llc -march=mips -mcpu=mips64 -target-abi n64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64
+; RUN: llc -march=mips -mcpu=mips64r2 -target-abi n64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64
+; RUN: llc -march=mips -mcpu=mips64r6 -target-abi n64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64R6
; FIXME: The MIPS16 test should check its output
; RUN: llc -march=mips -mattr=mips16 < %s
Modified: llvm/trunk/test/CodeGen/Mips/mips64extins.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips64extins.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips64extins.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips64extins.ll Thu Jun 23 07:42:53 2016
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -target-abi=n64 | FileCheck %s
+; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -target-abi=n64 | FileCheck %s
define i64 @dext(i64 %i) nounwind readnone {
entry:
Modified: llvm/trunk/test/CodeGen/Mips/mips64r6/compatibility.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips64r6/compatibility.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips64r6/compatibility.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips64r6/compatibility.ll Thu Jun 23 07:42:53 2016
@@ -1,5 +1,5 @@
-; RUN: llc -march=mipsel -mcpu=mips64r6 < %s | FileCheck %s
-; RUN: not llc -march=mipsel -mcpu=mips64r6 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s
+; RUN: llc -march=mipsel -mcpu=mips64r6 -target-abi n64 < %s | FileCheck %s
+; RUN: not llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s
; CHECK: foo:
; DSP: MIPS64r6 is not compatible with the DSP ASE
Modified: llvm/trunk/test/CodeGen/Mips/zeroreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/zeroreg.ll?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/zeroreg.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/zeroreg.ll Thu Jun 23 07:42:53 2016
@@ -1,10 +1,10 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=32-CMOV
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=32-CMOV
; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=32R6
-; RUN: llc < %s -march=mipsel -mcpu=mips4 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV
-; RUN: llc < %s -march=mipsel -mcpu=mips64 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV
-; RUN: llc < %s -march=mipsel -mcpu=mips64r2 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV
-; RUN: llc < %s -march=mipsel -mcpu=mips64r6 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64R6
+; RUN: llc < %s -march=mipsel -mcpu=mips4 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV
+; RUN: llc < %s -march=mipsel -mcpu=mips64 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV
+; RUN: llc < %s -march=mipsel -mcpu=mips64r2 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64-CMOV
+; RUN: llc < %s -march=mipsel -mcpu=mips64r6 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefix=ALL -check-prefix=64R6
@g1 = external global i32
Modified: llvm/trunk/test/MC/Mips/elf_eflags.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/elf_eflags.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/elf_eflags.s (original)
+++ llvm/trunk/test/MC/Mips/elf_eflags.s Thu Jun 23 07:42:53 2016
@@ -1,26 +1,26 @@
# These *MUST* match the output of 'gcc -c' compiled with the same triple and
# corresponding options (-mcpu=mips32 -> -mips32 for example).
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6 %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6 %s
# MIPSEL-MIPS64R6: Flags [ (0xA0000406)
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6-NAN2008 %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6-NAN2008 %s
# MIPSEL-MIPS64R6-NAN2008: Flags [ (0xA0000406)
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
# MIPSEL-MIPS64R2: Flags [ (0x80000006)
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
# MIPSEL-MIPS64R2-NAN2008: Flags [ (0x80000406)
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64 %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64 %s
# MIPSEL-MIPS64: Flags [ (0x60000006)
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64-NAN2008 %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64-NAN2008 %s
# MIPSEL-MIPS64-NAN2008: Flags [ (0x60000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r6 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R6 %s
@@ -126,5 +126,5 @@
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-NAN2008 %s
# MIPS64EL-MIPS64-NAN2008: Flags [ (0x60000406)
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=octeon %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-OCTEON %s
+# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=octeon -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-OCTEON %s
# MIPSEL-OCTEON: Flags [ (0x808B0006)
Modified: llvm/trunk/test/MC/Mips/mips64/abiflags.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64/abiflags.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64/abiflags.s (original)
+++ llvm/trunk/test/MC/Mips/mips64/abiflags.s Thu Jun 23 07:42:53 2016
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64 | \
+# RUN: llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64 -filetype=obj -o - | \
+# RUN: llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
Modified: llvm/trunk/test/MC/Mips/mips64r2/abi-bad.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64r2/abi-bad.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64r2/abi-bad.s (original)
+++ llvm/trunk/test/MC/Mips/mips64r2/abi-bad.s Thu Jun 23 07:42:53 2016
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r2 2>&1 | FileCheck %s
+# RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r2 -target-abi n64 2>&1 | FileCheck %s
.set fp=xx
# CHECK: error: '.set fp=xx' requires the O32 ABI
# CHECK: .set fp=xx
Modified: llvm/trunk/test/MC/Mips/mips64r2/abiflags.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64r2/abiflags.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64r2/abiflags.s (original)
+++ llvm/trunk/test/MC/Mips/mips64r2/abiflags.s Thu Jun 23 07:42:53 2016
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 | \
+# RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 -filetype=obj -o - | \
+# RUN: llvm-mc %s -arch=mips -mcpu=mips64r2 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
Modified: llvm/trunk/test/MC/Mips/mips64r3/abi-bad.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64r3/abi-bad.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64r3/abi-bad.s (original)
+++ llvm/trunk/test/MC/Mips/mips64r3/abi-bad.s Thu Jun 23 07:42:53 2016
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r3 2>&1 | FileCheck %s
+# RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r3 -target-abi n64 2>&1 | FileCheck %s
.set fp=xx
# CHECK: error: '.set fp=xx' requires the O32 ABI
# CHECK: .set fp=xx
Modified: llvm/trunk/test/MC/Mips/mips64r3/abiflags.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64r3/abiflags.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64r3/abiflags.s (original)
+++ llvm/trunk/test/MC/Mips/mips64r3/abiflags.s Thu Jun 23 07:42:53 2016
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 | \
+# RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 -filetype=obj -o - | \
+# RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
Modified: llvm/trunk/test/MC/Mips/mips64r5/abi-bad.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64r5/abi-bad.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64r5/abi-bad.s (original)
+++ llvm/trunk/test/MC/Mips/mips64r5/abi-bad.s Thu Jun 23 07:42:53 2016
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r5 2>&1 | FileCheck %s
+# RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r5 -target-abi n64 2>&1 | FileCheck %s
.set fp=xx
# CHECK: error: '.set fp=xx' requires the O32 ABI
# CHECK: .set fp=xx
Modified: llvm/trunk/test/MC/Mips/mips64r5/abiflags.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64r5/abiflags.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64r5/abiflags.s (original)
+++ llvm/trunk/test/MC/Mips/mips64r5/abiflags.s Thu Jun 23 07:42:53 2016
@@ -1,7 +1,7 @@
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 | \
+# RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 -target-abi n64 | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 -filetype=obj -o - | \
+# RUN: llvm-mc %s -arch=mips -mcpu=mips64r5 -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
Modified: llvm/trunk/test/MC/Mips/mips_abi_flags_xx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips_abi_flags_xx.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips_abi_flags_xx.s (original)
+++ llvm/trunk/test/MC/Mips/mips_abi_flags_xx.s Thu Jun 23 07:42:53 2016
@@ -16,7 +16,7 @@
# RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-32R6 \
# RUN: -check-prefix=CHECK-OBJ-MIPS
-# RUN: llvm-mc /dev/null -arch=mips -mcpu=octeon -filetype=obj -o - | \
+# RUN: llvm-mc /dev/null -arch=mips -mcpu=octeon -target-abi n64 -filetype=obj -o - | \
# RUN: llvm-readobj -sections -section-data -section-relocations -mips-abi-flags - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-64R2 \
# RUN: -check-prefix=CHECK-OBJ-OCTEON
Modified: llvm/trunk/test/MC/Mips/nooddspreg-cmdarg.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/nooddspreg-cmdarg.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/nooddspreg-cmdarg.s (original)
+++ llvm/trunk/test/MC/Mips/nooddspreg-cmdarg.s Thu Jun 23 07:42:53 2016
@@ -8,7 +8,7 @@
# RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n32 -mattr=+nooddspreg 2> %t0
# RUN: FileCheck %s -check-prefix=INVALID < %t0
#
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -mattr=+nooddspreg 2> %t0
+# RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 -mattr=+nooddspreg 2> %t0
# RUN: FileCheck %s -check-prefix=INVALID < %t0
#
# CHECK-ASM-NOT: .module nooddspreg
Modified: llvm/trunk/test/MC/Mips/nooddspreg.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/nooddspreg.s?rev=273557&r1=273556&r2=273557&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/nooddspreg.s (original)
+++ llvm/trunk/test/MC/Mips/nooddspreg.s Thu Jun 23 07:42:53 2016
@@ -8,7 +8,7 @@
# RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n32 2> %t1
# RUN: FileCheck %s -check-prefix=INVALID < %t1
#
-# RUN: not llvm-mc %s -arch=mips -mcpu=mips64 2> %t2
+# RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 2> %t2
# RUN: FileCheck %s -check-prefix=INVALID < %t2
#
# CHECK-ASM: .module nooddspreg
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