[PATCH] D21534: GlobalISel: first outline of legalization interface.

Quentin Colombet via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 22 14:55:15 PDT 2016


> On Jun 22, 2016, at 2:39 PM, Tim Northover <t.p.northover at gmail.com> wrote:
> 
>> I'm not sure if this is really going to work the way you want. On x86 with
>> AVX (but not AVX2), is LOAD <8 x i32> legal?  I mean, you could declare that
>> it is... but you're going to end up with a bunch of vector shuffles trying
>> to legalize ADD <8 x i32>. You could clean it up afterwards with some sort
>> of optimization pass to split vectors where it's profitable... but it gets
>> complicated when you start dealing with values with multiple uses and PHI
>> nodes.
> 
> This still seems to be something for RegBankSelect to me.

Agreed!
This is its main purpose :).

> It's going
> to see something like
> 
>    %0(256) = G_LOAD <4 x i32> ...
>    %1(128) = G_EXTRACT <2 x i32> %0, 0
>    %2(128) = G_EXTRACT <2 x i32> %0, 1
>    %3(128) = G_ADD <2 x i32> %1, ...
>    %4(128) = G_ADD <2 x i32> %2, ...
>    %5(256) = G_SEQ <4 x i32> %3 %4
> 
> and ought to have the cost model necessary to decide that (XMM, XMM)
> is the best register class (in whatever representation it has, an
> extension of the .td RegClasses with tuples) rather than YMM.

Yup.

> 
> Tim.



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