[PATCH] D21534: GlobalISel: first outline of legalization interface.

[Eli Friedman via llvm-commits]

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I'm not sure ScalarInVectorActions covers all the possibilities for legalization... for example, x86 prefers to legalize `<4 x i16>` to `<4 x i32>` rather than `<8 x i16>`.

It isn't clear how you plan on dealing with soft-float; for certain operations, like FABS, you probably want a separate "soften" action (so you can convert f64 FABS -> i64 AND -> i32 AND).

You really need to work out what to do with operations with multiple types sooner rather than later, given how common they are.  The existing legalization infrastructure basically splits it into multiple steps: first legalize the result type, then legalize each operand type.

For `<1 x i64>` vs. `i64`, the distinction is a bit fuzzy... but I'm not sure we can really afford to throw it away.  We're currently pretty comfortable with the distinction that `<1 x i64>` uses vector registers if possible, and `i64` doesn't.  Doing something different gets very complicated on x86-32 and other similar architectures because we would need to "legalize" i64 operations after register bank assignment.  Maybe it's worth doing so we can put values into vector registers more aggressively, but it's a lot more complicated.

You need some legalization action equivalent to "LegalizeDAG", I think.  Do you have something planned?


Repository:
  rL LLVM

http://reviews.llvm.org/D21534