[PATCH] D20830: Fix branch relaxation in 16-bit mode.

[Craig Topper via llvm-commits]

craig.topper added a comment.

Are there cases where 16-bit mode may need a full 32-bit offset that we need to support here? Or would that wrap the segment boundary for 16-bit mode and be illegal?


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Comment at: lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:138
@@ -137,2 +137,3 @@
 
-static unsigned getRelaxedOpcodeBranch(unsigned Op) {
+static unsigned getRelaxedOpcodeBranch(const MCInst &Inst, bool is16BitMode) {
+  unsigned Op = Inst.getOpcode();
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Why are we no longer passing just the Opcode to this function?


http://reviews.llvm.org/D20830