[PATCH] D21400: AMDGPU: Emit R_AMDGPU_ABS32_{HI,LO} for scratch buffer relocations

[Rafael Espíndola via llvm-commits]

Lgtm, but I have a question:

Will SCRATCH_RSRC_DWORD also need special  treatment in the linker? If so
we should have special relocations for it to avoid using names in the
linker. This is similar to how the got position is accessed: magical name
for the assembler, different relocation for the linker.

Cheers,
Rafael
On Jun 17, 2016 10:19 PM, "Tom Stellard" <thomas.stellard at amd.com> wrote:

tstellarAMD updated this revision to Diff 61153.
tstellarAMD added a comment.

Split the test case in to to avoid using llc -filetype=obj


http://reviews.llvm.org/D21400

Files:
  lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
  test/CodeGen/AMDGPU/large-alloca-compute.ll
  test/MC/AMDGPU/reloc.s

Index: test/MC/AMDGPU/reloc.s
===================================================================
--- /dev/null
+++ test/MC/AMDGPU/reloc.s
@@ -0,0 +1,12 @@
+// RUN: llvm-mc -filetype=obj -triple amdgcn-- -mcpu=kaveri -show-encoding
%s | llvm-readobj -relocations | FileCheck %s
+
+// CHECK: Relocations [
+// CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0
+// CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0
+// CHECK: ]
+
+kernel:
+  s_mov_b32 s0, SCRATCH_RSRC_DWORD0
+  s_mov_b32 s1, SCRATCH_RSRC_DWORD1
+
+.globl SCRATCH_RSRC_DWORD0
Index: test/CodeGen/AMDGPU/large-alloca-compute.ll
===================================================================
--- test/CodeGen/AMDGPU/large-alloca-compute.ll
+++ test/CodeGen/AMDGPU/large-alloca-compute.ll
@@ -8,9 +8,9 @@
 ; ALL-LABEL: {{^}}large_alloca_compute_shader:

 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
-; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD0, kind:
FK_Data_4
+; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD0
 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD1
-; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD1, kind:
FK_Data_4
+; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD1
 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, -1
 ; CI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe8f000
 ; VI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe80000
Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
===================================================================
--- lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
+++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
@@ -21,10 +21,7 @@
   AMDGPUELFObjectWriter(bool Is64Bit, bool HasRelocationAddend);
 protected:
   unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
-                        const MCFixup &Fixup, bool IsPCRel) const override
{
-    return Fixup.getKind();
-  }
-
+                        const MCFixup &Fixup, bool IsPCRel) const override;
 };


@@ -37,6 +34,20 @@
                             ELF::EM_AMDGPU,
                             HasRelocationAddend) { }

+unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
+                                             const MCValue &Target,
+                                             const MCFixup &Fixup,
+                                             bool IsPCRel) const {
+  // SCRATCH_RSRC_DWORD[01] is a special global variable that represents
+  // the scratch buffer.
+  if (Target.getSymA()->getSymbol().getName() == "SCRATCH_RSRC_DWORD0")
+    return ELF::R_AMDGPU_ABS32_LO;
+  if (Target.getSymA()->getSymbol().getName() == "SCRATCH_RSRC_DWORD1")
+    return ELF::R_AMDGPU_ABS32_HI;
+
+  llvm_unreachable("unhandled relocation type");
+}
+

 MCObjectWriter *llvm::createAMDGPUELFObjectWriter(bool Is64Bit,
                                                   bool HasRelocationAddend,
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160618/c140ce0c/attachment.html>