[PATCH] D21400: AMDGPU: Emit R_AMDGPU_ABS32_{HI, LO} for scratch buffer relocations

[Tom Stellard via llvm-commits]

tstellarAMD updated this revision to Diff 61025.
tstellarAMD added a comment.

Split changes outside of lib/Target/AMDGPU into a new patch: http://reviews.llvm.org/D21443


http://reviews.llvm.org/D21400

Files:
  lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
  test/CodeGen/AMDGPU/large-alloca-compute.ll

Index: test/CodeGen/AMDGPU/large-alloca-compute.ll
===================================================================
--- test/CodeGen/AMDGPU/large-alloca-compute.ll
+++ test/CodeGen/AMDGPU/large-alloca-compute.ll
@@ -2,9 +2,17 @@
 ; RUN: llc -march=amdgcn -mcpu=carrizo --show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=ALL %s
 ; RUN: llc -march=amdgcn -mcpu=bonaire -mtriple=amdgcn-unknown-amdhsa < %s -mattr=-flat-for-global | FileCheck -check-prefix=GCNHSA -check-prefix=CIHSA -check-prefix=ALL %s
 ; RUN: llc -march=amdgcn -mcpu=carrizo -mtriple=amdgcn-unknown-amdhsa -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCNHSA -check-prefix=VIHSA -check-prefix=ALL %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs -filetype=obj | llvm-readobj -relocations | FileCheck --check-prefix=ELF %s
 
 ; FIXME: align on alloca seems to be ignored for private_segment_alignment
 
+; ELF: Relocations [
+; ELF:  .rel.text {
+; ELF: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0
+; ELF: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0
+; ELF:  }
+; ELF: ]
+
 ; ALL-LABEL: {{^}}large_alloca_compute_shader:
 
 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
===================================================================
--- lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
+++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
@@ -21,10 +21,7 @@
   AMDGPUELFObjectWriter(bool Is64Bit, bool HasRelocationAddend);
 protected:
   unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
-                        const MCFixup &Fixup, bool IsPCRel) const override {
-    return Fixup.getKind();
-  }
-
+                        const MCFixup &Fixup, bool IsPCRel) const override;
 };
 
 
@@ -37,6 +34,24 @@
                             ELF::EM_AMDGPU,
                             HasRelocationAddend) { }
 
+unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
+                                             const MCValue &Target,
+                                             const MCFixup &Fixup,
+                                             bool IsPCRel) const {
+  switch (Fixup.getKind()) {
+  default: break;
+  case FK_Data_4:
+    // SCRATCH_RSRC_DWORD[01] is a special global variable that represents
+    // the scratch buffer.
+    if (Target.getSymA()->getSymbol().getName() == "SCRATCH_RSRC_DWORD0")
+      return ELF::R_AMDGPU_ABS32_LO;
+    if (Target.getSymA()->getSymbol().getName() == "SCRATCH_RSRC_DWORD1")
+      return ELF::R_AMDGPU_ABS32_HI;
+  }
+
+  llvm_unreachable("unhandled relocation type");
+}
+
 
 MCObjectWriter *llvm::createAMDGPUELFObjectWriter(bool Is64Bit,
                                                   bool HasRelocationAddend,


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