[PATCH] D20897: [AVX512/AVX][Intrinsics] Fix Variable Bit Shift Right Arithmetic intrinsic lowering.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 13 04:11:23 PDT 2016


RKSimon added a comment.

> No, I belive it is correctness issue.  vpsrav intrinsic lowering with constant out-of-range shift value is incorrect.


Thanks for the example - the issue you describe seems to be that the x86 variable shift intrinsics are being mapped to ISD::SRA - I think this is the problem you are encountering?


================
Comment at: lib/Target/X86/X86IntrinsicsInfo.h:326
@@ -326,1 +325,3 @@
+  X86_INTRINSIC_DATA(avx2_psrav_d,     INTR_SRA, ISD::SRA, 0),
+  X86_INTRINSIC_DATA(avx2_psrav_d_256, INTR_SRA, ISD::SRA, 0),
   X86_INTRINSIC_DATA(avx2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
----------------
These variable shift intrinsics should NOT use the ISD::SRA opcode but need a X86ISD::VSRAV opcode instead - similarly for the logical left/right intrinsics.


Repository:
  rL LLVM

http://reviews.llvm.org/D20897





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