[PATCH] D20310: Teach LLVM about Power 9 D-Form VSX Instructions

[Hal Finkel via llvm-commits]

hfinkel added a comment.

In http://reviews.llvm.org/D20310#452368, @cycheng wrote:

> > Yes, except that I'm not sure that we want to remove the register classes, just the register definitions themselves. This makes the change smaller, and also does not force us to add VSX-only data types to the Altivec register classes. In short, add VR0-31 directly to VSHRC. Does that make sense? Then you'll need some, but not all, of the changes you outline below.
>
> > 
>
> > Thanks again,
>
> > Hal
>
>
> Hi Hal,
>
> I’ve seen some benefits because of this elimination, when I was fixing test case failures, I found we could generate shorter code than before. So I thought it is a right direction to simplify register hierarchy.
>
> I had update 7 codegen test cases, but I still had one test case failure, that was encoding checking, I will fix it soon.
>
> The new VSRC is composed of (VSLRC, VRRC), so I have removed all VSH related def and use.


Okay, so you're saying that we generate even better code by eliminating VSHRC in addition to eliminating the register definitions themselves. In that case, I look forward to the updated patch :-)

Thanks again, Hal

> CY





http://reviews.llvm.org/D20310