[PATCH] D20860: [X86][SSE] Replace (V)CVTTPS2DQ and VCVTTPD2DQ truncating (round to zero) f32/f64 to i32 with generic IR (llvm)

[Ahmed Bougacha via llvm-commits]

ab accepted this revision.
ab added a comment.
This revision is now accepted and ready to land.

LGTM


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Comment at: lib/Target/X86/X86InstrSSE.td:2111-2112
@@ -2125,4 +2110,4 @@
 let Predicates = [HasAVX, NoVLX] in {
   def : Pat<(v4i32 (fp_to_sint (v4f64 VR256:$src))),
             (VCVTTPD2DQYrr VR256:$src)>;
   def : Pat<(v4i32 (fp_to_sint (loadv4f64 addr:$src))),
----------------
Have you looked into moving the patterns into the instruction defs? Might be tricky with NoVLX though.


Repository:
  rL LLVM

http://reviews.llvm.org/D20860