[llvm] r271222 - [X86][SSE] Updated storeu fast-isel tests to match clang builtin tests
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon May 30 12:09:35 PDT 2016
And why wasn't the _mm256_storeu_pd using the storeu intrinsic before?
On Mon, May 30, 2016 at 11:58 AM, Craig Topper <craig.topper at gmail.com>
wrote:
> Do we have a script that generates these or are these maintained by hand?
>
> On Mon, May 30, 2016 at 11:42 AM, Simon Pilgrim via llvm-commits <
> llvm-commits at lists.llvm.org> wrote:
>
>> Author: rksimon
>> Date: Mon May 30 13:42:51 2016
>> New Revision: 271222
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=271222&view=rev
>> Log:
>> [X86][SSE] Updated storeu fast-isel tests to match clang builtin tests
>>
>> Since rL271214 the headers have no longer used the storeu intrinsic
>>
>> Modified:
>> llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
>> llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
>> llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
>>
>> Modified: llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll?rev=271222&r1=271221&r2=271222&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll Mon May 30
>> 13:42:51 2016
>> @@ -3144,15 +3144,14 @@ define void @test_mm256_storeu2_m128(flo
>> ; X64-NEXT: vmovups %xmm0, (%rsi)
>> ; X64-NEXT: vzeroupper
>> ; X64-NEXT: retq
>> - %arg0 = bitcast float* %a0 to i8*
>> + %arg0 = bitcast float* %a0 to <4 x float>*
>> %lo = shufflevector <8 x float> %a2, <8 x float> %a2, <4 x i32> <i32
>> 0, i32 1, i32 2, i32 3>
>> - call void @llvm.x86.sse.storeu.ps(i8* %arg0, <4 x float> %lo)
>> - %arg1 = bitcast float* %a1 to i8*
>> + store <4 x float> %lo, <4 x float>* %arg0, align 1
>> + %arg1 = bitcast float* %a1 to <4 x float>*
>> %hi = shufflevector <8 x float> %a2, <8 x float> %a2, <4 x i32> <i32
>> 4, i32 5, i32 6, i32 7>
>> - call void @llvm.x86.sse.storeu.ps(i8* %arg1, <4 x float> %hi)
>> + store <4 x float> %hi, <4 x float>* %arg1, align 1
>> ret void
>> }
>> -declare void @llvm.x86.sse.storeu.ps(i8*, <4 x float>) nounwind readnone
>>
>> define void @test_mm256_storeu2_m128d(double* %a0, double* %a1, <4 x
>> double> %a2) nounwind {
>> ; X32-LABEL: test_mm256_storeu2_m128d:
>> @@ -3172,15 +3171,14 @@ define void @test_mm256_storeu2_m128d(do
>> ; X64-NEXT: vmovups %xmm0, (%rsi)
>> ; X64-NEXT: vzeroupper
>> ; X64-NEXT: retq
>> - %arg0 = bitcast double* %a0 to i8*
>> + %arg0 = bitcast double* %a0 to <2 x double>*
>> %lo = shufflevector <4 x double> %a2, <4 x double> %a2, <2 x i32> <i32
>> 0, i32 1>
>> - call void @llvm.x86.sse2.storeu.pd(i8* %arg0, <2 x double> %lo)
>> - %arg1 = bitcast double* %a1 to i8*
>> + store <2 x double> %lo, <2 x double>* %arg0, align 1
>> + %arg1 = bitcast double* %a1 to <2 x double>*
>> %hi = shufflevector <4 x double> %a2, <4 x double> %a2, <2 x i32> <i32
>> 2, i32 3>
>> - call void @llvm.x86.sse2.storeu.pd(i8* %arg1, <2 x double> %hi)
>> + store <2 x double> %hi, <2 x double>* %arg1, align 1
>> ret void
>> }
>> -declare void @llvm.x86.sse2.storeu.pd(i8*, <2 x double>) nounwind
>> readnone
>>
>> define void @test_mm256_storeu2_m128i(<2 x i64>* %a0, <2 x i64>* %a1, <4
>> x i64> %a2) nounwind {
>> ; X32-LABEL: test_mm256_storeu2_m128i:
>> @@ -3200,17 +3198,14 @@ define void @test_mm256_storeu2_m128i(<2
>> ; X64-NEXT: vmovups %xmm0, (%rsi)
>> ; X64-NEXT: vzeroupper
>> ; X64-NEXT: retq
>> - %arg0 = bitcast <2 x i64>* %a0 to i8*
>> - %lo2 = shufflevector <4 x i64> %a2, <4 x i64> %a2, <2 x i32> <i32 0,
>> i32 1>
>> - %lo = bitcast <2 x i64> %lo2 to <16 x i8>
>> - call void @llvm.x86.sse2.storeu.dq(i8* %arg0, <16 x i8> %lo)
>> - %arg1 = bitcast <2 x i64>* %a1 to i8*
>> - %hi2 = shufflevector <4 x i64> %a2, <4 x i64> %a2, <2 x i32> <i32 2,
>> i32 3>
>> - %hi = bitcast <2 x i64> %hi2 to <16 x i8>
>> - call void @llvm.x86.sse2.storeu.dq(i8* %arg1, <16 x i8> %hi)
>> + %arg0 = bitcast <2 x i64>* %a0 to <2 x i64>*
>> + %lo = shufflevector <4 x i64> %a2, <4 x i64> %a2, <2 x i32> <i32 0,
>> i32 1>
>> + store <2 x i64> %lo, <2 x i64>* %arg0, align 1
>> + %arg1 = bitcast <2 x i64>* %a1 to <2 x i64>*
>> + %hi = shufflevector <4 x i64> %a2, <4 x i64> %a2, <2 x i32> <i32 2,
>> i32 3>
>> + store <2 x i64> %hi, <2 x i64>* %arg1, align 1
>> ret void
>> }
>> -declare void @llvm.x86.sse2.storeu.dq(i8*, <16 x i8>) nounwind readnone
>>
>> define void @test_mm256_stream_pd(double *%a0, <4 x double> %a1)
>> nounwind {
>> ; X32-LABEL: test_mm256_stream_pd:
>>
>> Modified: llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll?rev=271222&r1=271221&r2=271222&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll Mon May 30
>> 13:42:51 2016
>> @@ -1920,11 +1920,10 @@ define void @test_mm_storeu_ps(float *%a
>> ; X64: # BB#0:
>> ; X64-NEXT: movups %xmm0, (%rdi)
>> ; X64-NEXT: retq
>> - %arg0 = bitcast float* %a0 to i8*
>> - call void @llvm.x86.sse.storeu.ps(i8* %arg0, <4 x float> %a1)
>> + %arg0 = bitcast float* %a0 to <4 x float>*
>> + store <4 x float> %a1, <4 x float>* %arg0, align 1
>> ret void
>> }
>> -declare void @llvm.x86.sse.storeu.ps(i8*, <4 x float>) nounwind
>>
>> define void @test_mm_stream_ps(float *%a0, <4 x float> %a1) {
>> ; X32-LABEL: test_mm_stream_ps:
>>
>> Modified: llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll?rev=271222&r1=271221&r2=271222&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll Mon May 30
>> 13:42:51 2016
>> @@ -3255,11 +3255,10 @@ define void @test_mm_storeu_pd(double *%
>> ; X64: # BB#0:
>> ; X64-NEXT: movups %xmm0, (%rdi)
>> ; X64-NEXT: retq
>> - %arg0 = bitcast double* %a0 to i8*
>> - call void @llvm.x86.sse2.storeu.pd(i8* %arg0, <2 x double> %a1)
>> + %arg0 = bitcast double* %a0 to <2 x double>*
>> + store <2 x double> %a1, <2 x double>* %arg0, align 1
>> ret void
>> }
>> -declare void @llvm.x86.sse2.storeu.pd(i8*, <2 x double>) nounwind
>>
>> define void @test_mm_storeu_si128(<2 x i64> *%a0, <2 x i64> %a1) {
>> ; X32-LABEL: test_mm_storeu_si128:
>> @@ -3272,12 +3271,9 @@ define void @test_mm_storeu_si128(<2 x i
>> ; X64: # BB#0:
>> ; X64-NEXT: movups %xmm0, (%rdi)
>> ; X64-NEXT: retq
>> - %arg0 = bitcast <2 x i64>* %a0 to i8*
>> - %arg1 = bitcast <2 x i64> %a1 to <16 x i8>
>> - call void @llvm.x86.sse2.storeu.dq(i8* %arg0, <16 x i8> %arg1)
>> + store <2 x i64> %a1, <2 x i64>* %a0, align 1
>> ret void
>> }
>> -declare void @llvm.x86.sse2.storeu.dq(i8*, <16 x i8>) nounwind
>>
>> define void @test_mm_stream_pd(double *%a0, <2 x double> %a1) {
>> ; X32-LABEL: test_mm_stream_pd:
>>
>>
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>
>
>
> --
> ~Craig
>
--
~Craig
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