[PATCH] D19268: [DAGCombiner] Do not remove the load of stored values when optimizations are disabled

[Quentin Colombet via llvm-commits]

qcolombet added inline comments.

================
Comment at: test/CodeGen/ARM/dag-combine-ldst.ll:9
@@ +8,3 @@
+; CHECK_O0: add	r0, r0, #2
+; CHECK_O1-NOT: add	r0, r0, #2
+
----------------
Could you add more check lines?

The problem I have here is that r0 is not defined by a value coming from the ABI and technically anything could feed that r0 register.
I.e., the test could pass because we generate add r1, r1 for instance. Therefore, please make sure the input register for the add is defined by the instruction we expect.

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Comment at: test/CodeGen/SystemZ/swift-return.ll:55
@@ -56,2 +54,3 @@
+; CHECK-O0: la %r2, 168(%r15)
 ; CHECK-O0: brasl %r14, gen2
 ; CHECK-O0-DAG: l %r{{.*}}, 184(%r15)
----------------
Where did the lgr instruction go?


Repository:
  rL LLVM

http://reviews.llvm.org/D19268