[llvm] r270764 - [X86][SSE41] Regenerated intrinsics tests

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed May 25 14:21:52 PDT 2016


Author: rksimon
Date: Wed May 25 16:21:51 2016
New Revision: 270764

URL: http://llvm.org/viewvc/llvm-project?rev=270764&view=rev
Log:
[X86][SSE41] Regenerated intrinsics tests

Modified:
    llvm/trunk/test/CodeGen/X86/sse41-intrinsics-x86-upgrade.ll
    llvm/trunk/test/CodeGen/X86/sse41-intrinsics-x86.ll

Modified: llvm/trunk/test/CodeGen/X86/sse41-intrinsics-x86-upgrade.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse41-intrinsics-x86-upgrade.ll?rev=270764&r1=270763&r2=270764&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse41-intrinsics-x86-upgrade.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse41-intrinsics-x86-upgrade.ll Wed May 25 16:21:51 2016
@@ -1,17 +1,25 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse4.1 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse4.1 | FileCheck %s
+
 ; This test works just like the non-upgrade one except that it only checks
 ; forms which require auto-upgrading.
 
 define <2 x double> @test_x86_sse41_blendpd(<2 x double> %a0, <2 x double> %a1) {
-  ; CHECK: blendpd
-  %res = call <2 x double> @llvm.x86.sse41.blendpd(<2 x double> %a0, <2 x double> %a1, i32 7) ; <<2 x double>> [#uses=1]
+; CHECK-LABEL: test_x86_sse41_blendpd:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
+; CHECK-NEXT:    retl
+  %res = call <2 x double> @llvm.x86.sse41.blendpd(<2 x double> %a0, <2 x double> %a1, i32 6) ; <<2 x double>> [#uses=1]
   ret <2 x double> %res
 }
 declare <2 x double> @llvm.x86.sse41.blendpd(<2 x double>, <2 x double>, i32) nounwind readnone
 
 
 define <4 x float> @test_x86_sse41_blendps(<4 x float> %a0, <4 x float> %a1) {
-  ; CHECK: blendps
+; CHECK-LABEL: test_x86_sse41_blendps:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
+; CHECK-NEXT:    retl
   %res = call <4 x float> @llvm.x86.sse41.blendps(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1]
   ret <4 x float> %res
 }
@@ -19,7 +27,10 @@ declare <4 x float> @llvm.x86.sse41.blen
 
 
 define <2 x double> @test_x86_sse41_dppd(<2 x double> %a0, <2 x double> %a1) {
-  ; CHECK: dppd
+; CHECK-LABEL: test_x86_sse41_dppd:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    dppd $7, %xmm1, %xmm0
+; CHECK-NEXT:    retl
   %res = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i32 7) ; <<2 x double>> [#uses=1]
   ret <2 x double> %res
 }
@@ -27,7 +38,10 @@ declare <2 x double> @llvm.x86.sse41.dpp
 
 
 define <4 x float> @test_x86_sse41_dpps(<4 x float> %a0, <4 x float> %a1) {
-  ; CHECK: dpps
+; CHECK-LABEL: test_x86_sse41_dpps:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    dpps $7, %xmm1, %xmm0
+; CHECK-NEXT:    retl
   %res = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1]
   ret <4 x float> %res
 }
@@ -35,15 +49,21 @@ declare <4 x float> @llvm.x86.sse41.dpps
 
 
 define <4 x float> @test_x86_sse41_insertps(<4 x float> %a0, <4 x float> %a1) {
-  ; CHECK: insertps
-  %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1]
+; CHECK-LABEL: test_x86_sse41_insertps:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3]
+; CHECK-NEXT:    retl
+  %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i32 17) ; <<4 x float>> [#uses=1]
   ret <4 x float> %res
 }
 declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i32) nounwind readnone
 
 
 define <8 x i16> @test_x86_sse41_mpsadbw(<16 x i8> %a0, <16 x i8> %a1) {
-  ; CHECK: mpsadbw
+; CHECK-LABEL: test_x86_sse41_mpsadbw:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    mpsadbw $7, %xmm1, %xmm0
+; CHECK-NEXT:    retl
   %res = call <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8> %a0, <16 x i8> %a1, i32 7) ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %res
 }
@@ -51,7 +71,10 @@ declare <8 x i16> @llvm.x86.sse41.mpsadb
 
 
 define <8 x i16> @test_x86_sse41_pblendw(<8 x i16> %a0, <8 x i16> %a1) {
-  ; CHECK: pblendw
+; CHECK-LABEL: test_x86_sse41_pblendw:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3,4,5,6,7]
+; CHECK-NEXT:    retl
   %res = call <8 x i16> @llvm.x86.sse41.pblendw(<8 x i16> %a0, <8 x i16> %a1, i32 7) ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %res
 }
@@ -59,7 +82,10 @@ declare <8 x i16> @llvm.x86.sse41.pblend
 
 
 define <4 x i32> @test_x86_sse41_pmovsxbd(<16 x i8> %a0) {
-  ; CHECK: pmovsxbd
+; CHECK-LABEL: test_x86_sse41_pmovsxbd:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    pmovsxbd %xmm0, %xmm0
+; CHECK-NEXT:    retl
   %res = call <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8> %a0) ; <<4 x i32>> [#uses=1]
   ret <4 x i32> %res
 }
@@ -67,7 +93,10 @@ declare <4 x i32> @llvm.x86.sse41.pmovsx
 
 
 define <2 x i64> @test_x86_sse41_pmovsxbq(<16 x i8> %a0) {
-  ; CHECK: pmovsxbq
+; CHECK-LABEL: test_x86_sse41_pmovsxbq:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    pmovsxbq %xmm0, %xmm0
+; CHECK-NEXT:    retl
   %res = call <2 x i64> @llvm.x86.sse41.pmovsxbq(<16 x i8> %a0) ; <<2 x i64>> [#uses=1]
   ret <2 x i64> %res
 }
@@ -75,7 +104,10 @@ declare <2 x i64> @llvm.x86.sse41.pmovsx
 
 
 define <8 x i16> @test_x86_sse41_pmovsxbw(<16 x i8> %a0) {
-  ; CHECK: pmovsxbw
+; CHECK-LABEL: test_x86_sse41_pmovsxbw:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    pmovsxbw %xmm0, %xmm0
+; CHECK-NEXT:    retl
   %res = call <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8> %a0) ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %res
 }
@@ -83,7 +115,10 @@ declare <8 x i16> @llvm.x86.sse41.pmovsx
 
 
 define <2 x i64> @test_x86_sse41_pmovsxdq(<4 x i32> %a0) {
-  ; CHECK: pmovsxdq
+; CHECK-LABEL: test_x86_sse41_pmovsxdq:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    pmovsxdq %xmm0, %xmm0
+; CHECK-NEXT:    retl
   %res = call <2 x i64> @llvm.x86.sse41.pmovsxdq(<4 x i32> %a0) ; <<2 x i64>> [#uses=1]
   ret <2 x i64> %res
 }
@@ -91,7 +126,10 @@ declare <2 x i64> @llvm.x86.sse41.pmovsx
 
 
 define <4 x i32> @test_x86_sse41_pmovsxwd(<8 x i16> %a0) {
-  ; CHECK: pmovsxwd
+; CHECK-LABEL: test_x86_sse41_pmovsxwd:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    pmovsxwd %xmm0, %xmm0
+; CHECK-NEXT:    retl
   %res = call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %a0) ; <<4 x i32>> [#uses=1]
   ret <4 x i32> %res
 }
@@ -99,7 +137,10 @@ declare <4 x i32> @llvm.x86.sse41.pmovsx
 
 
 define <2 x i64> @test_x86_sse41_pmovsxwq(<8 x i16> %a0) {
-  ; CHECK: pmovsxwq
+; CHECK-LABEL: test_x86_sse41_pmovsxwq:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    pmovsxwq %xmm0, %xmm0
+; CHECK-NEXT:    retl
   %res = call <2 x i64> @llvm.x86.sse41.pmovsxwq(<8 x i16> %a0) ; <<2 x i64>> [#uses=1]
   ret <2 x i64> %res
 }

Modified: llvm/trunk/test/CodeGen/X86/sse41-intrinsics-x86.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse41-intrinsics-x86.ll?rev=270764&r1=270763&r2=270764&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse41-intrinsics-x86.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse41-intrinsics-x86.ll Wed May 25 16:21:51 2016
@@ -1,8 +1,20 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse4.1 | FileCheck %s
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE41
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
 
 define <2 x double> @test_x86_sse41_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
-  ; CHECK: blendvpd
+; SSE41-LABEL: test_x86_sse41_blendvpd:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    movapd %xmm0, %xmm3
+; SSE41-NEXT:    movaps %xmm2, %xmm0
+; SSE41-NEXT:    blendvpd %xmm1, %xmm3
+; SSE41-NEXT:    movapd %xmm3, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_blendvpd:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vblendvpd %xmm2, %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) ; <<2 x double>> [#uses=1]
   ret <2 x double> %res
 }
@@ -10,7 +22,18 @@ declare <2 x double> @llvm.x86.sse41.ble
 
 
 define <4 x float> @test_x86_sse41_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
-  ; CHECK: blendvps
+; SSE41-LABEL: test_x86_sse41_blendvps:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    movaps %xmm0, %xmm3
+; SSE41-NEXT:    movaps %xmm2, %xmm0
+; SSE41-NEXT:    blendvps %xmm1, %xmm3
+; SSE41-NEXT:    movaps %xmm3, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_blendvps:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vblendvps %xmm2, %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) ; <<4 x float>> [#uses=1]
   ret <4 x float> %res
 }
@@ -18,7 +41,15 @@ declare <4 x float> @llvm.x86.sse41.blen
 
 
 define <2 x double> @test_x86_sse41_dppd(<2 x double> %a0, <2 x double> %a1) {
-  ; CHECK: dppd
+; SSE41-LABEL: test_x86_sse41_dppd:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    dppd $7, %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_dppd:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vdppd $7, %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1]
   ret <2 x double> %res
 }
@@ -26,7 +57,15 @@ declare <2 x double> @llvm.x86.sse41.dpp
 
 
 define <4 x float> @test_x86_sse41_dpps(<4 x float> %a0, <4 x float> %a1) {
-  ; CHECK: dpps
+; SSE41-LABEL: test_x86_sse41_dpps:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    dpps $7, %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_dpps:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vdpps $7, %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1]
   ret <4 x float> %res
 }
@@ -34,8 +73,16 @@ declare <4 x float> @llvm.x86.sse41.dpps
 
 
 define <4 x float> @test_x86_sse41_insertps(<4 x float> %a0, <4 x float> %a1) {
-  ; CHECK: insertps
-  %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1]
+; SSE41-LABEL: test_x86_sse41_insertps:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3]
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_insertps:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3]
+; KNL-NEXT:    retl
+  %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 17) ; <<4 x float>> [#uses=1]
   ret <4 x float> %res
 }
 declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i8) nounwind readnone
@@ -43,7 +90,15 @@ declare <4 x float> @llvm.x86.sse41.inse
 
 
 define <8 x i16> @test_x86_sse41_mpsadbw(<16 x i8> %a0, <16 x i8> %a1) {
-  ; CHECK: mpsadbw
+; SSE41-LABEL: test_x86_sse41_mpsadbw:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    mpsadbw $7, %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_mpsadbw:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vmpsadbw $7, %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %res
 }
@@ -51,7 +106,15 @@ declare <8 x i16> @llvm.x86.sse41.mpsadb
 
 
 define <8 x i16> @test_x86_sse41_packusdw(<4 x i32> %a0, <4 x i32> %a1) {
-  ; CHECK: packusdw
+; SSE41-LABEL: test_x86_sse41_packusdw:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    packusdw %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_packusdw:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %a0, <4 x i32> %a1) ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %res
 }
@@ -59,7 +122,18 @@ declare <8 x i16> @llvm.x86.sse41.packus
 
 
 define <16 x i8> @test_x86_sse41_pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) {
-  ; CHECK: pblendvb
+; SSE41-LABEL: test_x86_sse41_pblendvb:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    movdqa %xmm0, %xmm3
+; SSE41-NEXT:    movaps %xmm2, %xmm0
+; SSE41-NEXT:    pblendvb %xmm1, %xmm3
+; SSE41-NEXT:    movdqa %xmm3, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pblendvb:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) ; <<16 x i8>> [#uses=1]
   ret <16 x i8> %res
 }
@@ -67,7 +141,15 @@ declare <16 x i8> @llvm.x86.sse41.pblend
 
 
 define <8 x i16> @test_x86_sse41_pblendw(<8 x i16> %a0, <8 x i16> %a1) {
-  ; CHECK: pblendw
+; SSE41-LABEL: test_x86_sse41_pblendw:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3,4,5,6,7]
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pblendw:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpblendw {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3,4,5,6,7]
+; KNL-NEXT:    retl
   %res = call <8 x i16> @llvm.x86.sse41.pblendw(<8 x i16> %a0, <8 x i16> %a1, i8 7) ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %res
 }
@@ -75,7 +157,15 @@ declare <8 x i16> @llvm.x86.sse41.pblend
 
 
 define <8 x i16> @test_x86_sse41_phminposuw(<8 x i16> %a0) {
-  ; CHECK: phminposuw
+; SSE41-LABEL: test_x86_sse41_phminposuw:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    phminposuw %xmm0, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_phminposuw:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vphminposuw %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16> %a0) ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %res
 }
@@ -83,7 +173,15 @@ declare <8 x i16> @llvm.x86.sse41.phminp
 
 
 define <16 x i8> @test_x86_sse41_pmaxsb(<16 x i8> %a0, <16 x i8> %a1) {
-  ; CHECK: pmaxsb
+; SSE41-LABEL: test_x86_sse41_pmaxsb:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmaxsb %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmaxsb:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmaxsb %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1]
   ret <16 x i8> %res
 }
@@ -91,7 +189,15 @@ declare <16 x i8> @llvm.x86.sse41.pmaxsb
 
 
 define <4 x i32> @test_x86_sse41_pmaxsd(<4 x i32> %a0, <4 x i32> %a1) {
-  ; CHECK: pmaxsd
+; SSE41-LABEL: test_x86_sse41_pmaxsd:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmaxsd %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmaxsd:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmaxsd %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
   ret <4 x i32> %res
 }
@@ -99,7 +205,15 @@ declare <4 x i32> @llvm.x86.sse41.pmaxsd
 
 
 define <4 x i32> @test_x86_sse41_pmaxud(<4 x i32> %a0, <4 x i32> %a1) {
-  ; CHECK: pmaxud
+; SSE41-LABEL: test_x86_sse41_pmaxud:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmaxud %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmaxud:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmaxud %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
   ret <4 x i32> %res
 }
@@ -107,7 +221,15 @@ declare <4 x i32> @llvm.x86.sse41.pmaxud
 
 
 define <8 x i16> @test_x86_sse41_pmaxuw(<8 x i16> %a0, <8 x i16> %a1) {
-  ; CHECK: pmaxuw
+; SSE41-LABEL: test_x86_sse41_pmaxuw:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmaxuw %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmaxuw:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmaxuw %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %res
 }
@@ -115,7 +237,15 @@ declare <8 x i16> @llvm.x86.sse41.pmaxuw
 
 
 define <16 x i8> @test_x86_sse41_pminsb(<16 x i8> %a0, <16 x i8> %a1) {
-  ; CHECK: pminsb
+; SSE41-LABEL: test_x86_sse41_pminsb:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pminsb %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pminsb:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpminsb %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1]
   ret <16 x i8> %res
 }
@@ -123,7 +253,15 @@ declare <16 x i8> @llvm.x86.sse41.pminsb
 
 
 define <4 x i32> @test_x86_sse41_pminsd(<4 x i32> %a0, <4 x i32> %a1) {
-  ; CHECK: pminsd
+; SSE41-LABEL: test_x86_sse41_pminsd:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pminsd %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pminsd:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpminsd %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
   ret <4 x i32> %res
 }
@@ -131,7 +269,15 @@ declare <4 x i32> @llvm.x86.sse41.pminsd
 
 
 define <4 x i32> @test_x86_sse41_pminud(<4 x i32> %a0, <4 x i32> %a1) {
-  ; CHECK: pminud
+; SSE41-LABEL: test_x86_sse41_pminud:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pminud %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pminud:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpminud %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
   ret <4 x i32> %res
 }
@@ -139,7 +285,15 @@ declare <4 x i32> @llvm.x86.sse41.pminud
 
 
 define <8 x i16> @test_x86_sse41_pminuw(<8 x i16> %a0, <8 x i16> %a1) {
-  ; CHECK: pminuw
+; SSE41-LABEL: test_x86_sse41_pminuw:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pminuw %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pminuw:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpminuw %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %res
 }
@@ -147,7 +301,15 @@ declare <8 x i16> @llvm.x86.sse41.pminuw
 
 
 define <4 x i32> @test_x86_sse41_pmovzxbd(<16 x i8> %a0) {
-  ; CHECK: pmovzxbd
+; SSE41-LABEL: test_x86_sse41_pmovzxbd:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmovzxbd:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; KNL-NEXT:    retl
   %res = call <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8> %a0) ; <<4 x i32>> [#uses=1]
   ret <4 x i32> %res
 }
@@ -155,7 +317,15 @@ declare <4 x i32> @llvm.x86.sse41.pmovzx
 
 
 define <2 x i64> @test_x86_sse41_pmovzxbq(<16 x i8> %a0) {
-  ; CHECK: pmovzxbq
+; SSE41-LABEL: test_x86_sse41_pmovzxbq:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmovzxbq:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
+; KNL-NEXT:    retl
   %res = call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %a0) ; <<2 x i64>> [#uses=1]
   ret <2 x i64> %res
 }
@@ -163,7 +333,15 @@ declare <2 x i64> @llvm.x86.sse41.pmovzx
 
 
 define <8 x i16> @test_x86_sse41_pmovzxbw(<16 x i8> %a0) {
-  ; CHECK: pmovzxbw
+; SSE41-LABEL: test_x86_sse41_pmovzxbw:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmovzxbw:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
+; KNL-NEXT:    retl
   %res = call <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8> %a0) ; <<8 x i16>> [#uses=1]
   ret <8 x i16> %res
 }
@@ -171,7 +349,15 @@ declare <8 x i16> @llvm.x86.sse41.pmovzx
 
 
 define <2 x i64> @test_x86_sse41_pmovzxdq(<4 x i32> %a0) {
-  ; CHECK: pmovzxdq
+; SSE41-LABEL: test_x86_sse41_pmovzxdq:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmovzxdq:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
+; KNL-NEXT:    retl
   %res = call <2 x i64> @llvm.x86.sse41.pmovzxdq(<4 x i32> %a0) ; <<2 x i64>> [#uses=1]
   ret <2 x i64> %res
 }
@@ -179,7 +365,15 @@ declare <2 x i64> @llvm.x86.sse41.pmovzx
 
 
 define <4 x i32> @test_x86_sse41_pmovzxwd(<8 x i16> %a0) {
-  ; CHECK: pmovzxwd
+; SSE41-LABEL: test_x86_sse41_pmovzxwd:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmovzxwd:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; KNL-NEXT:    retl
   %res = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %a0) ; <<4 x i32>> [#uses=1]
   ret <4 x i32> %res
 }
@@ -187,7 +381,15 @@ declare <4 x i32> @llvm.x86.sse41.pmovzx
 
 
 define <2 x i64> @test_x86_sse41_pmovzxwq(<8 x i16> %a0) {
-  ; CHECK: pmovzxwq
+; SSE41-LABEL: test_x86_sse41_pmovzxwq:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmovzxwq:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; KNL-NEXT:    retl
   %res = call <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16> %a0) ; <<2 x i64>> [#uses=1]
   ret <2 x i64> %res
 }
@@ -195,7 +397,15 @@ declare <2 x i64> @llvm.x86.sse41.pmovzx
 
 
 define <2 x i64> @test_x86_sse41_pmuldq(<4 x i32> %a0, <4 x i32> %a1) {
-  ; CHECK: pmuldq
+; SSE41-LABEL: test_x86_sse41_pmuldq:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    pmuldq %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_pmuldq:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vpmuldq %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32> %a0, <4 x i32> %a1) ; <<2 x i64>> [#uses=1]
   ret <2 x i64> %res
 }
@@ -203,8 +413,19 @@ declare <2 x i64> @llvm.x86.sse41.pmuldq
 
 
 define i32 @test_x86_sse41_ptestc(<2 x i64> %a0, <2 x i64> %a1) {
-  ; CHECK: ptest 
-  ; CHECK: sbbl
+; SSE41-LABEL: test_x86_sse41_ptestc:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    ptest %xmm1, %xmm0
+; SSE41-NEXT:    sbbl %eax, %eax
+; SSE41-NEXT:    andl $1, %eax
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_ptestc:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vptest %xmm1, %xmm0
+; KNL-NEXT:    sbbl %eax, %eax
+; KNL-NEXT:    andl $1, %eax
+; KNL-NEXT:    retl
   %res = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1]
   ret i32 %res
 }
@@ -212,9 +433,19 @@ declare i32 @llvm.x86.sse41.ptestc(<2 x
 
 
 define i32 @test_x86_sse41_ptestnzc(<2 x i64> %a0, <2 x i64> %a1) {
-  ; CHECK: ptest 
-  ; CHECK: seta
-  ; CHECK: movzbl
+; SSE41-LABEL: test_x86_sse41_ptestnzc:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    ptest %xmm1, %xmm0
+; SSE41-NEXT:    seta %al
+; SSE41-NEXT:    movzbl %al, %eax
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_ptestnzc:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vptest %xmm1, %xmm0
+; KNL-NEXT:    seta %al
+; KNL-NEXT:    movzbl %al, %eax
+; KNL-NEXT:    retl
   %res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1]
   ret i32 %res
 }
@@ -222,9 +453,19 @@ declare i32 @llvm.x86.sse41.ptestnzc(<2
 
 
 define i32 @test_x86_sse41_ptestz(<2 x i64> %a0, <2 x i64> %a1) {
-  ; CHECK: ptest 
-  ; CHECK: sete
-  ; CHECK: movzbl
+; SSE41-LABEL: test_x86_sse41_ptestz:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    ptest %xmm1, %xmm0
+; SSE41-NEXT:    sete %al
+; SSE41-NEXT:    movzbl %al, %eax
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_ptestz:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vptest %xmm1, %xmm0
+; KNL-NEXT:    sete %al
+; KNL-NEXT:    movzbl %al, %eax
+; KNL-NEXT:    retl
   %res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1]
   ret i32 %res
 }
@@ -232,7 +473,15 @@ declare i32 @llvm.x86.sse41.ptestz(<2 x
 
 
 define <2 x double> @test_x86_sse41_round_pd(<2 x double> %a0) {
-  ; CHECK: roundpd
+; SSE41-LABEL: test_x86_sse41_round_pd:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    roundpd $7, %xmm0, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_round_pd:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vroundpd $7, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %a0, i32 7) ; <<2 x double>> [#uses=1]
   ret <2 x double> %res
 }
@@ -240,7 +489,15 @@ declare <2 x double> @llvm.x86.sse41.rou
 
 
 define <4 x float> @test_x86_sse41_round_ps(<4 x float> %a0) {
-  ; CHECK: roundps
+; SSE41-LABEL: test_x86_sse41_round_ps:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    roundps $7, %xmm0, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_round_ps:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vroundps $7, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %a0, i32 7) ; <<4 x float>> [#uses=1]
   ret <4 x float> %res
 }
@@ -248,7 +505,15 @@ declare <4 x float> @llvm.x86.sse41.roun
 
 
 define <2 x double> @test_x86_sse41_round_sd(<2 x double> %a0, <2 x double> %a1) {
-  ; CHECK: roundsd
+; SSE41-LABEL: test_x86_sse41_round_sd:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    roundsd $7, %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_round_sd:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vroundsd $7, %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7) ; <<2 x double>> [#uses=1]
   ret <2 x double> %res
 }
@@ -256,7 +521,15 @@ declare <2 x double> @llvm.x86.sse41.rou
 
 
 define <4 x float> @test_x86_sse41_round_ss(<4 x float> %a0, <4 x float> %a1) {
-  ; CHECK: roundss
+; SSE41-LABEL: test_x86_sse41_round_ss:
+; SSE41:       ## BB#0:
+; SSE41-NEXT:    roundss $7, %xmm1, %xmm0
+; SSE41-NEXT:    retl
+;
+; KNL-LABEL: test_x86_sse41_round_ss:
+; KNL:       ## BB#0:
+; KNL-NEXT:    vroundss $7, %xmm1, %xmm0, %xmm0
+; KNL-NEXT:    retl
   %res = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1]
   ret <4 x float> %res
 }




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