[PATCH] D20591: [InstCombine] Catch more bswap cases missed due to zext and truncs.
Geoff Berry via llvm-commits
llvm-commits at lists.llvm.org
Wed May 25 10:40:46 PDT 2016
gberry added inline comments.
Comment at: test/Transforms/InstCombine/bswap.ll:106
@@ +105,3 @@
+ %conv = zext i16 %a to i32
+ %shr = lshr i16 %a, 8
+ %shl = shl i32 %conv, 8
Shouldn't this be an i32 lshr of %conv and the second zext below deleted if you want the IR to look like it would for a target without i16 as a legal type?
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