[PATCH] D20624: [mips] bnec/beqc register constraint fix

Simon Dardis via llvm-commits llvm-commits at lists.llvm.org
Wed May 25 08:13:04 PDT 2016

sdardis created this revision.
sdardis added reviewers: dsanders, vkalintiris.
sdardis added a subscriber: llvm-commits.
sdardis set the repository for this revision to rL LLVM.
Herald added subscribers: sdardis, dsanders.

beqc and bnec cannot have $rs == $rt. Inhibit compact branch creation
if that would occur.




Index: lib/Target/Mips/MipsInstrInfo.cpp
--- lib/Target/Mips/MipsInstrInfo.cpp
+++ lib/Target/Mips/MipsInstrInfo.cpp
@@ -301,13 +301,15 @@
     case Mips::BEQ:
       if (canUseShortMicroMipsCTI)
         return Mips::BEQZC_MM;
-      else
-        return Mips::BEQC;
+      else if (I->getOperand(0).getReg() == I->getOperand(1).getReg())
+        return 0;
+      return Mips::BEQC;
     case Mips::BNE:
       if (canUseShortMicroMipsCTI)
         return Mips::BNEZC_MM;
-      else
-        return Mips::BNEC;
+      else if (I->getOperand(0).getReg() == I->getOperand(1).getReg())
+        return 0;
+      return Mips::BNEC;
     case Mips::BGE:
       if (I->getOperand(0).getReg() == I->getOperand(1).getReg())
         return 0;

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