[llvm] r270235 - [RegBankSelect] Specify different optimization mode for the pass.

[Quentin Colombet via llvm-commits]

Author: qcolombet
Date: Fri May 20 11:55:35 2016
New Revision: 270235

URL: http://llvm.org/viewvc/llvm-project?rev=270235&view=rev
Log:
[RegBankSelect] Specify different optimization mode for the pass.

The mode should be choose by the target when instantiating the pass.

Modified:
    llvm/trunk/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
    llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp

Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/RegBankSelect.h?rev=270235&r1=270234&r2=270235&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/RegBankSelect.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/RegBankSelect.h Fri May 20 11:55:35 2016
@@ -80,6 +80,16 @@ class RegBankSelect : public MachineFunc
 public:
   static char ID;
 
+  /// List of the modes supported by the RegBankSelect pass.
+  enum Mode {
+    /// Assign the register banks as fast as possible (default).
+    Fast,
+    /// Greedily minimize the cost of assigning register banks.
+    /// This should produce code of greater quality, but will
+    /// require more compile time.
+    Greedy
+  };
+
   /// Abstract class used to represent an insertion point in a CFG.
   /// This class records an insertion point and materializes it on
   /// demand.
@@ -453,6 +463,9 @@ private:
   /// Helper class used for every code morphing.
   MachineIRBuilder MIRBuilder;
 
+  /// Optimization mode of the pass.
+  Mode OptMode;
+
   /// Assign the register bank of each operand of \p MI.
   void assignInstr(MachineInstr &MI);
 
@@ -535,8 +548,8 @@ private:
                     SmallVectorImpl<RepairingPlacement> &RepairPts);
 
 public:
-  // Ctor, nothing fancy.
-  RegBankSelect();
+  /// Create a RegBankSelect pass with the specified \p RunningMode.
+  RegBankSelect(Mode RunningMode = Fast);
 
   const char *getPassName() const override {
     return "RegBankSelect";

Modified: llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp?rev=270235&r1=270234&r2=270235&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp Fri May 20 11:55:35 2016
@@ -29,8 +29,9 @@ INITIALIZE_PASS(RegBankSelect, "regbanks
                 "Assign register bank of generic virtual registers",
                 false, false);
 
-RegBankSelect::RegBankSelect()
-    : MachineFunctionPass(ID), RBI(nullptr), MRI(nullptr) {
+RegBankSelect::RegBankSelect(Mode RunningMode)
+    : MachineFunctionPass(ID), RBI(nullptr), MRI(nullptr),
+      OptMode(RunningMode) {
   initializeRegBankSelectPass(*PassRegistry::getPassRegistry());
 }
 
@@ -39,6 +40,7 @@ void RegBankSelect::init(MachineFunction
   assert(RBI && "Cannot work without RegisterBankInfo");
   MRI = &MF.getRegInfo();
   TRI = MF.getSubtarget().getRegisterInfo();
+  assert(OptMode == Mode::Fast && "Non-fast mode not implemented");
   MIRBuilder.setMF(MF);
 }