[llvm] r270048 - ps][microMIPS] Add R_MICROMIPS_PC21_S1 relocation
Zoran Jovanovic via llvm-commits
llvm-commits at lists.llvm.org
Thu May 19 05:20:41 PDT 2016
Author: zjovanovic
Date: Thu May 19 07:20:40 2016
New Revision: 270048
URL: http://llvm.org/viewvc/llvm-project?rev=270048&view=rev
Log:
ps][microMIPS] Add R_MICROMIPS_PC21_S1 relocation
Differential Revision: http://reviews.llvm.org/D15526
Modified:
llvm/trunk/include/llvm/Support/ELFRelocs/Mips.def
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
llvm/trunk/test/MC/Mips/micromips32r6/relocations.s
llvm/trunk/test/MC/Mips/micromips64r6/relocations.s
Modified: llvm/trunk/include/llvm/Support/ELFRelocs/Mips.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ELFRelocs/Mips.def?rev=270048&r1=270047&r2=270048&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/ELFRelocs/Mips.def (original)
+++ llvm/trunk/include/llvm/Support/ELFRelocs/Mips.def Thu May 19 07:20:40 2016
@@ -108,7 +108,7 @@ ELF_RELOC(R_MICROMIPS_TLS_TPREL_HI16,
ELF_RELOC(R_MICROMIPS_TLS_TPREL_LO16, 170)
ELF_RELOC(R_MICROMIPS_GPREL7_S2, 172)
ELF_RELOC(R_MICROMIPS_PC23_S2, 173)
-ELF_RELOC(R_MICROMIPS_PC21_S2, 174)
+ELF_RELOC(R_MICROMIPS_PC21_S1, 174)
ELF_RELOC(R_MICROMIPS_PC26_S1, 175)
ELF_RELOC(R_MICROMIPS_PC18_S3, 176)
ELF_RELOC(R_MICROMIPS_PC19_S2, 177)
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp?rev=270048&r1=270047&r2=270048&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp Thu May 19 07:20:40 2016
@@ -189,7 +189,15 @@ static unsigned adjustFixupValue(const M
return 0;
}
break;
-
+ case Mips::fixup_MICROMIPS_PC21_S1:
+ // Forcing a signed division because Value can be negative.
+ Value = (int64_t)Value / 2;
+ // We now check if Value can be encoded as a 21-bit signed immediate.
+ if (!isInt<21>(Value) && Ctx) {
+ Ctx->reportError(Fixup.getLoc(), "out of range PC21 fixup");
+ return 0;
+ }
+ break;
}
return Value;
@@ -343,6 +351,7 @@ getFixupKindInfo(MCFixupKind Kind) const
{ "fixup_MICROMIPS_PC26_S1", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_PC18_S3", 0, 18, MCFixupKindInfo::FKF_IsPCRel },
+ { "fixup_MICROMIPS_PC21_S1", 0, 21, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_CALL16", 0, 16, 0 },
{ "fixup_MICROMIPS_GOT_DISP", 0, 16, 0 },
{ "fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 },
@@ -411,6 +420,7 @@ getFixupKindInfo(MCFixupKind Kind) const
{ "fixup_MICROMIPS_PC26_S1", 6, 26, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_PC19_S2",13, 19, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_PC18_S3",14, 18, MCFixupKindInfo::FKF_IsPCRel },
+ { "fixup_MICROMIPS_PC21_S1",11, 21, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_CALL16", 16, 16, 0 },
{ "fixup_MICROMIPS_GOT_DISP", 16, 16, 0 },
{ "fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 },
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp?rev=270048&r1=270047&r2=270048&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp Thu May 19 07:20:40 2016
@@ -247,6 +247,8 @@ unsigned MipsELFObjectWriter::getRelocTy
return ELF::R_MICROMIPS_PC19_S2;
case Mips::fixup_MICROMIPS_PC18_S3:
return ELF::R_MICROMIPS_PC18_S3;
+ case Mips::fixup_MICROMIPS_PC21_S1:
+ return ELF::R_MICROMIPS_PC21_S1;
case Mips::fixup_MIPS_PC19_S2:
return ELF::R_MIPS_PC19_S2;
case Mips::fixup_MIPS_PC18_S3:
@@ -608,7 +610,7 @@ bool MipsELFObjectWriter::needsRelocateW
case ELF::R_MICROMIPS_TLS_TPREL_LO16:
case ELF::R_MICROMIPS_GPREL7_S2:
case ELF::R_MICROMIPS_PC23_S2:
- case ELF::R_MICROMIPS_PC21_S2:
+ case ELF::R_MICROMIPS_PC21_S1:
case ELF::R_MICROMIPS_PC26_S1:
case ELF::R_MICROMIPS_PC18_S3:
case ELF::R_MICROMIPS_PC19_S2:
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h?rev=270048&r1=270047&r2=270048&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h Thu May 19 07:20:40 2016
@@ -176,6 +176,9 @@ namespace Mips {
// resulting in - R_MICROMIPS_PC18_S3
fixup_MICROMIPS_PC18_S3,
+ // resulting in - R_MICROMIPS_PC21_S1
+ fixup_MICROMIPS_PC21_S1,
+
// resulting in - R_MICROMIPS_CALL16
fixup_MICROMIPS_CALL16,
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp?rev=270048&r1=270047&r2=270048&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp Thu May 19 07:20:40 2016
@@ -384,7 +384,10 @@ getBranchTarget21OpValueMM(const MCInst
assert(MO.isExpr() &&
"getBranchTarget21OpValueMM expects only expressions or immediates");
- // TODO: Push fixup.
+ const MCExpr *FixupExpression = MCBinaryExpr::createAdd(
+ MO.getExpr(), MCConstantExpr::create(-4, Ctx), Ctx);
+ Fixups.push_back(MCFixup::create(0, FixupExpression,
+ MCFixupKind(Mips::fixup_MICROMIPS_PC21_S1)));
return 0;
}
Modified: llvm/trunk/test/MC/Mips/micromips32r6/relocations.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips32r6/relocations.s?rev=270048&r1=270047&r2=270048&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips32r6/relocations.s (original)
+++ llvm/trunk/test/MC/Mips/micromips32r6/relocations.s Thu May 19 07:20:40 2016
@@ -17,6 +17,12 @@
# CHECK-FIXUP: lwpc $2, bar # encoding: [0x78,0b01001AAA,A,A]
# CHECK-FIXUP: # fixup A - offset: 0,
# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
+# CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
+# CHECK-FIXUP: # fixup A - offset: 0,
+# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
+# CHECK-FIXUP: bnezc $3, bar # encoding: [0xa0,0b011AAAAA,A,A]
+# CHECK-FIXUP: # fixup A - offset: 0,
+# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
#------------------------------------------------------------------------------
# Check that the appropriate relocations were created.
#------------------------------------------------------------------------------
@@ -25,9 +31,13 @@
# CHECK-ELF: 0x4 R_MICROMIPS_PC26_S1 bar 0x0
# CHECK-ELF: 0x8 R_MICROMIPS_PC19_S2 bar 0x0
# CHECK-ELF: 0xC R_MICROMIPS_PC19_S2 bar 0x0
+# CHECK-ELF: 0x10 R_MICROMIPS_PC21_S1 bar 0x0
+# CHECK-ELF: 0x14 R_MICROMIPS_PC21_S1 bar 0x0
# CHECK-ELF: ]
balc bar
bc bar
addiupc $2,bar
lwpc $2,bar
+ beqzc $3, bar
+ bnezc $3, bar
Modified: llvm/trunk/test/MC/Mips/micromips64r6/relocations.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips64r6/relocations.s?rev=270048&r1=270047&r2=270048&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips64r6/relocations.s (original)
+++ llvm/trunk/test/MC/Mips/micromips64r6/relocations.s Thu May 19 07:20:40 2016
@@ -20,6 +20,12 @@
# CHECK-FIXUP: ldpc $2, bar # encoding: [0x78,0b010110AA,A,A]
# CHECK-FIXUP: # fixup A - offset: 0,
# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC18_S3
+# CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
+# CHECK-FIXUP: # fixup A - offset: 0,
+# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
+# CHECK-FIXUP: bnezc $3, bar # encoding: [0xa0,0b011AAAAA,A,A]
+# CHECK-FIXUP: # fixup A - offset: 0,
+# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
#------------------------------------------------------------------------------
# Check that the appropriate relocations were created.
#------------------------------------------------------------------------------
@@ -29,6 +35,8 @@
# CHECK-ELF: 0x8 R_MICROMIPS_PC19_S2 bar 0x0
# CHECK-ELF: 0xC R_MICROMIPS_PC19_S2 bar 0x0
# CHECK-ELF: 0x10 R_MICROMIPS_PC18_S3 bar 0x0
+# CHECK-ELF: 0x14 R_MICROMIPS_PC21_S1 bar 0x0
+# CHECK-ELF: 0x18 R_MICROMIPS_PC21_S1 bar 0x0
# CHECK-ELF: ]
balc bar
@@ -36,3 +44,5 @@
addiupc $2,bar
lwpc $2,bar
ldpc $2, bar
+ beqzc $3, bar
+ bnezc $3, bar
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