[llvm] r269337 - Fixed the callee saved registers list for X86 AllRegs calling convention.
Amjad Aboud via llvm-commits
llvm-commits at lists.llvm.org
Thu May 12 12:58:33 PDT 2016
Author: aaboud
Date: Thu May 12 14:58:32 2016
New Revision: 269337
URL: http://llvm.org/viewvc/llvm-project?rev=269337&view=rev
Log:
Fixed the callee saved registers list for X86 AllRegs calling convention.
32-bit AllRegs:
SSE: xmm0-xmm7
AVX: ymm0-ymm7
AVX512: zmm0-zmm7 + k0-k7
64-bit AllRegs:
SSE: xmm0-xmm15
AVX: ymm0-ymm15
AVX512: zmm0-zmm31 + k0-k7
Differential Revision: http://reviews.llvm.org/D20142
Modified:
llvm/trunk/lib/Target/X86/X86CallingConv.td
llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
llvm/trunk/test/CodeGen/X86/x86-interrupt_cc.ll
Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CallingConv.td?rev=269337&r1=269336&r2=269337&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86CallingConv.td (original)
+++ llvm/trunk/lib/Target/X86/X86CallingConv.td Thu May 12 14:58:32 2016
@@ -890,18 +890,23 @@ def CSR_64_MostRegs : CalleeSavedRegs<(a
(sequence "XMM%u", 0, 15))>;
def CSR_32_AllRegs : CalleeSavedRegs<(add EAX, EBX, ECX, EDX, EBP, ESI,
- EDI, ESP)>;
+ EDI)>;
def CSR_32_AllRegs_SSE : CalleeSavedRegs<(add CSR_32_AllRegs,
(sequence "XMM%u", 0, 7))>;
+def CSR_32_AllRegs_AVX : CalleeSavedRegs<(add CSR_32_AllRegs,
+ (sequence "YMM%u", 0, 7))>;
+def CSR_32_AllRegs_AVX512 : CalleeSavedRegs<(add CSR_32_AllRegs,
+ (sequence "ZMM%u", 0, 7),
+ (sequence "K%u", 0, 7))>;
-def CSR_64_AllRegs : CalleeSavedRegs<(add CSR_64_MostRegs, RAX, RSP,
- (sequence "XMM%u", 16, 31))>;
-def CSR_64_AllRegs_AVX : CalleeSavedRegs<(sub (add CSR_64_MostRegs, RAX, RSP,
+def CSR_64_AllRegs : CalleeSavedRegs<(add CSR_64_MostRegs, RAX)>;
+def CSR_64_AllRegs_AVX : CalleeSavedRegs<(sub (add CSR_64_MostRegs, RAX,
(sequence "YMM%u", 0, 15)),
(sequence "XMM%u", 0, 15))>;
-def CSR_64_AllRegs_AVX512 : CalleeSavedRegs<(sub (add CSR_64_MostRegs, RAX, RSP,
- (sequence "ZMM%u", 0, 31)),
- (sequence "XMM%u", 0, 15))>;
+def CSR_64_AllRegs_AVX512 : CalleeSavedRegs<(sub (add CSR_64_MostRegs, RAX,
+ (sequence "ZMM%u", 0, 31),
+ (sequence "K%u", 0, 7)),
+ (sequence "XMM%u", 0, 15))>;
// Standard C + YMM6-15
def CSR_Win64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12,
Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=269337&r1=269336&r2=269337&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Thu May 12 14:58:32 2016
@@ -300,10 +300,13 @@ X86RegisterInfo::getCalleeSavedRegs(cons
return CSR_64_AllRegs_AVX_SaveList;
return CSR_64_AllRegs_SaveList;
} else {
+ if (HasAVX512)
+ return CSR_32_AllRegs_AVX512_SaveList;
+ if (HasAVX)
+ return CSR_32_AllRegs_AVX_SaveList;
if (HasSSE)
return CSR_32_AllRegs_SSE_SaveList;
- else
- return CSR_32_AllRegs_SaveList;
+ return CSR_32_AllRegs_SaveList;
}
default:
break;
@@ -389,16 +392,18 @@ X86RegisterInfo::getCallPreservedMask(co
return CSR_64_AllRegs_AVX512_RegMask;
if (HasAVX)
return CSR_64_AllRegs_AVX_RegMask;
- else
- return CSR_64_AllRegs_RegMask;
+ return CSR_64_AllRegs_RegMask;
} else {
+ if (HasAVX512)
+ return CSR_32_AllRegs_AVX512_RegMask;
+ if (HasAVX)
+ return CSR_32_AllRegs_AVX_RegMask;
if (HasSSE)
return CSR_32_AllRegs_SSE_RegMask;
- else
- return CSR_32_AllRegs_RegMask;
+ return CSR_32_AllRegs_RegMask;
}
- default:
- break;
+ default:
+ break;
}
// Unlike getCalleeSavedRegs(), we don't have MMI so we can't check
Modified: llvm/trunk/test/CodeGen/X86/x86-interrupt_cc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-interrupt_cc.ll?rev=269337&r1=269336&r2=269337&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-interrupt_cc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-interrupt_cc.ll Thu May 12 14:58:32 2016
@@ -1,12 +1,26 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-macosx -show-mc-encoding -mattr=+avx512f < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-macosx -show-mc-encoding -mattr=+avx512f < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK64
+; RUN: llc -verify-machineinstrs -mtriple=i386-apple-macosx -show-mc-encoding -mattr=+avx512f < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK32
-
-; Make sure we spill the high numbered YMM registers with the right encoding.
+; Make sure we spill the high numbered ZMM registers and K registers with the right encoding.
; CHECK-LABEL: foo
-; CHECK: movups %zmm31, {{.+}}
-; CHECK: encoding: [0x62,0x61,0x7c,0x48,0x11,0xbc,0x24,0x10,0x08,0x00,0x00]
+; CHECK: kmovq %k7, {{.+}}
+; CHECK64: encoding: [0xc4,0xe1,0xf8,0x91,0xbc,0x24,0x68,0x08,0x00,0x00]
+; CHECK32: encoding: [0xc4,0xe1,0xf8,0x91,0xbc,0x24,0x68,0x02,0x00,0x00]
+; k6 is used as an anchor for the previous regexp.
+; CHECK-NEXT: kmovq %k6
+
+; CHECK64: movups %zmm31, {{.+}}
+; CHECK64: encoding: [0x62,0x61,0x7c,0x48,0x11,0xbc,0x24,0xe0,0x07,0x00,0x00]
; zmm30 is used as an anchor for the previous regexp.
-; CHECK-NEXT: movups %zmm30
+; CHECK64-NEXT: movups %zmm30
+
+; CHECK32-NOT: zmm31
+; CHECK32-NOT: zmm8
+; CHECK32: movups %zmm7, {{.+}}
+; CHECK32: encoding: [0x62,0xf1,0x7c,0x48,0x11,0xbc,0x24,0xe0,0x01,0x00,0x00]
+; zmm6 is used as an anchor for the previous regexp.
+; CHECK32-NEXT: movups %zmm6
+
; CHECK: call
; CHECK: iret
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