[PATCH] D16719: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions

[Zlatko Buljan via llvm-commits]

zbuljan updated this revision to Diff 57028.
zbuljan added a comment.

Rebased to work with TOT.
Changed immediate to uimm16 in alias definitions for AND instruction.
Added DAG patterns to description clases of AND, OR and XOR instructions.
Added AddedComplexity parameter to definitions of AND16, OR16 and XOR16 instructions so they can be prioritized during instruction selection.
Updated and.ll and or.ll with IR code to check some constants that are and are not encodable in 16-bit form.
Added invalid tests for operand checking.


http://reviews.llvm.org/D16719

Files:
  lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
  lib/Target/Mips/MicroMips32r6InstrInfo.td
  lib/Target/Mips/MicroMipsInstrInfo.td
  lib/Target/Mips/MipsInstrInfo.td
  test/CodeGen/Mips/llvm-ir/and.ll
  test/CodeGen/Mips/llvm-ir/ashr.ll
  test/CodeGen/Mips/llvm-ir/lshr.ll
  test/CodeGen/Mips/llvm-ir/not.ll
  test/CodeGen/Mips/llvm-ir/or.ll
  test/CodeGen/Mips/llvm-ir/shl.ll
  test/CodeGen/Mips/llvm-ir/xor.ll
  test/MC/Disassembler/Mips/micromips32r3/valid-el.txt
  test/MC/Disassembler/Mips/micromips32r3/valid.txt
  test/MC/Disassembler/Mips/micromips32r6/valid.txt
  test/MC/Disassembler/Mips/micromips64r6/valid.txt
  test/MC/Mips/micromips-alu-instructions.s
  test/MC/Mips/micromips/invalid.s
  test/MC/Mips/micromips32r6/invalid.s
  test/MC/Mips/micromips32r6/valid.s
  test/MC/Mips/micromips64r6/invalid.s
  test/MC/Mips/micromips64r6/valid.s

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D16719.57028.patch
Type: text/x-patch
Size: 78202 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160512/4578084e/attachment.bin>