[PATCH] D19713: [mips][microMIPS] Implement CFC*, CTC* and LDC* instructions

[Simon Dardis via llvm-commits]

sdardis accepted this revision.
sdardis added a comment.
This revision is now accepted and ready to land.

LGTM with nits (inlined) addressed.


================
Comment at: test/CodeGen/Mips/cconv/callee-saved-float.ll:20
@@ -19,2 +19,3 @@
 ; RUN: llc -march=mips64el -target-abi n64 < %s | FileCheck --check-prefix=ALL --check-prefix=ALL-INV --check-prefix=N64-INV %s
+; RUN: llc -march=mips -mcpu=mips32r6 -mattr=micromips -filetype=obj < %s -o - | llvm-objdump -no-show-raw-insn -arch mips -mcpu=mips32r6 -mattr=micromips -d - | FileCheck --check-prefix=MM32R6 %s
 
----------------

Add

  ; CHECK-NOT: LDC164

along with -asm-show-inst

================
Comment at: test/CodeGen/Mips/cconv/callee-saved-float.ll:113
@@ -111,1 +112,3 @@
 ; N64:           addiu $sp, $sp, 64
+; Check the mapping between LDC164 and LDC1_64_MMR6.
+; MM32R6: ldc1
----------------
Nit: Insert a blank line between the existing and new checks, so that it's very obvious it's testing something different.

================
Comment at: test/CodeGen/Mips/ldc1.ll:4-58
@@ +3,57 @@
+
+define void @HouseMatrix(double** %H, double* %v, i32 %start, i32 %end) #0 {
+entry:
+  %H.addr = alloca double**, align 8
+  %v.addr = alloca double*, align 8
+  %start.addr = alloca i32, align 4
+  %end.addr = alloca i32, align 4
+  %i = alloca i32, align 4
+  %j = alloca i32, align 4
+  %a = alloca double, align 8
+  store double** %H, double*** %H.addr, align 8
+  store double* %v, double** %v.addr, align 8
+  store i32 %start, i32* %start.addr, align 4
+  store i32 %end, i32* %end.addr, align 4
+  %0 = load double*, double** %v.addr, align 8
+  %1 = load double*, double** %v.addr, align 8
+  %2 = load i32, i32* %start.addr, align 4
+  %3 = load i32, i32* %end.addr, align 4
+  %4 = load double**, double*** %H.addr, align 8
+  %5 = load i32, i32* %start.addr, align 4
+  store i32 %5, i32* %i, align 4
+  %6 = load i32, i32* %i, align 4
+  %7 = load i32, i32* %end.addr, align 4
+  %cmp = icmp sle i32 %6, %7
+  %8 = load i32, i32* %start.addr, align 4
+  store i32 %8, i32* %j, align 4
+  %9 = load i32, i32* %j, align 4
+  %10 = load i32, i32* %end.addr, align 4
+  %cmp2 = icmp sle i32 %9, %10
+  %11 = load double, double* %a, align 8
+  %12 = load i32, i32* %i, align 4
+  %idxprom = sext i32 %12 to i64
+  %13 = load double*, double** %v.addr, align 8
+  %arrayidx = getelementptr inbounds double, double* %13, i64 %idxprom
+  %14 = load double, double* %arrayidx, align 8
+  %mul = fmul double %11, %14
+  %15 = load i32, i32* %j, align 4
+  %idxprom4 = sext i32 %15 to i64
+  %16 = load double*, double** %v.addr, align 8
+  %arrayidx5 = getelementptr inbounds double, double* %16, i64 %idxprom4
+  %17 = load double, double* %arrayidx5, align 8
+  %mul6 = fmul double %mul, %17
+  %18 = load i32, i32* %j, align 4
+  %idxprom7 = sext i32 %18 to i64
+  %19 = load i32, i32* %i, align 4
+  %idxprom8 = sext i32 %19 to i64
+  %20 = load double**, double*** %H.addr, align 8
+  %arrayidx9 = getelementptr inbounds double*, double** %20, i64 %idxprom8
+  %21 = load double*, double** %arrayidx9, align 8
+  %arrayidx10 = getelementptr inbounds double, double* %21, i64 %idxprom7
+  %22 = load double, double* %arrayidx10, align 8
+  %sub = fsub double %22, %mul6
+  store double %sub, double* %arrayidx10, align 8
+  ; CHECK:      ldc1
+  ; CHECK-NOT:  LDC164
+  ret void
+}
----------------
All of this can be simplified to:

  define double @f(double * %a){
    ; CHECK-LABEL: f
    ; CHECK:     ldc1
    ; CHECK-NOT: LDC164
    %1 = load double, double * %a
    ret double %1
  }

Checking spills and reloads is covered by callee-saved-float.ll


http://reviews.llvm.org/D19713