[PATCH] D19368: Allow Sparc back-end to take the address of a function (or other global object)

[Chris Dewhurst via llvm-commits]

lero_chris updated this revision to Diff 56129.
lero_chris added a comment.

Unit tests to go with this change.


Repository:
  rL LLVM

http://reviews.llvm.org/D19368

Files:
  lib/Target/Sparc/DelaySlotFiller.cpp
  test/CodeGen/SPARC/func-addr.ll

Index: test/CodeGen/SPARC/func-addr.ll
===================================================================
--- test/CodeGen/SPARC/func-addr.ll
+++ test/CodeGen/SPARC/func-addr.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -march=sparc   -relocation-model=static -code-model=small  | FileCheck --check-prefix=abs32 %s
+; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=small  | FileCheck --check-prefix=abs32 %s
+; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=medium | FileCheck --check-prefix=abs44 %s
+; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=large  | FileCheck --check-prefix=abs64 %s
+; RUN: llc < %s -march=sparc   -relocation-model=pic    -code-model=medium | FileCheck --check-prefix=v8pic32 %s
+; RUN: llc < %s -march=sparcv9 -relocation-model=pic    -code-model=medium | FileCheck --check-prefix=v9pic32 %s
+
+define void @func1() #0 {
+entry:
+  ret void
+}
+
+define void @test() #0 {
+entry:
+  %pFunc = alloca void (...)*, align 4
+  store void (...)* bitcast (void ()* @func1 to void (...)*), void (...)** %pFunc, align 4
+  %0 = load void (...)*, void (...)** %pFunc, align 4
+  %callee.knr.cast = bitcast void (...)* %0 to void ()*
+  call void %callee.knr.cast()
+
+; abs32-LABEL:   test
+; abs32:          sethi %hi(func1), %i0
+; abs32:          add %i0, %lo(func1), %i1
+; abs32:          call %i0+%lo(func1)
+
+; abs44-LABEL:   test
+; abs44:          sethi %h44(func1), %i0
+; abs44:          add %i0, %m44(func1), %i0
+; abs44:          sllx %i0, 12, %i0
+; abs44:          add %i0, %l44(func1), %i1
+; abs44:          call %i0+%l44(func1)
+
+; abs64-LABEL:   test
+; abs64:          sethi %hi(func1), %i0
+; abs64:          add %i0, %lo(func1), %i0
+; abs64:          sethi %hh(func1), %i1
+; abs64:          add %i1, %hm(func1), %i1
+
+; v8pic32-LABEL: test
+; v8pic32:        sethi %hi(func1), %i1
+; v8pic32:        add %i1, %lo(func1), %i1
+; v8pic32:        ld [%i0+%i1], %i0
+
+; v9pic32-LABEL: test
+; v9pic32:        sethi %hi(func1), %i1
+; v9pic32:        add %i1, %lo(func1), %i1
+; v9pic32:        ldx [%i0+%i1], %i0
+; v9pic32:        call %i0
+
+  ret void
+}
Index: lib/Target/Sparc/DelaySlotFiller.cpp
===================================================================
--- lib/Target/Sparc/DelaySlotFiller.cpp
+++ lib/Target/Sparc/DelaySlotFiller.cpp
@@ -295,12 +295,12 @@
     assert(Reg.isUse() && "CALL first operand is not a use.");
     RegUses.insert(Reg.getReg());
 
-    const MachineOperand &RegOrImm = MI->getOperand(1);
-    if (RegOrImm.isImm() || RegOrImm.isGlobal())
+    const MachineOperand &Operand1 = MI->getOperand(1);
+    if (Operand1.isImm() || Operand1.isGlobal())
         break;
-    assert(RegOrImm.isReg() && "CALLrr second operand is not a register.");
-    assert(RegOrImm.isUse() && "CALLrr second operand is not a use.");
-    RegUses.insert(RegOrImm.getReg());
+    assert(Operand1.isReg() && "CALLrr second operand is not a register.");
+    assert(Operand1.isUse() && "CALLrr second operand is not a use.");
+    RegUses.insert(Operand1.getReg());
     break;
   }
 }


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