[PATCH] D19766: [Clang][avx512][Builtin] Adding intrinsics for cvtw2mask{128|256|512} instruction set

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL268385: [Clang][avx512][Builtin] Adding intrinsics for cvtw2mask{128|256|512}… (authored by mzuckerm).

Changed prior to commit:
  http://reviews.llvm.org/D19766?vs=55718&id=55992#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D19766

Files:
  cfe/trunk/include/clang/Basic/BuiltinsX86.def
  cfe/trunk/lib/Headers/avx512bwintrin.h
  cfe/trunk/lib/Headers/avx512vlbwintrin.h
  cfe/trunk/test/CodeGen/avx512bw-builtins.c
  cfe/trunk/test/CodeGen/avx512vlbw-builtins.c

Index: cfe/trunk/lib/Headers/avx512vlbwintrin.h
===================================================================
--- cfe/trunk/lib/Headers/avx512vlbwintrin.h
+++ cfe/trunk/lib/Headers/avx512vlbwintrin.h
@@ -3181,6 +3181,18 @@
   return (__mmask32) __builtin_ia32_cvtb2mask256 ((__v32qi) __A);
 }
 
+static __inline__ __mmask8 __DEFAULT_FN_ATTRS
+_mm_movepi16_mask (__m128i __A)
+{
+  return (__mmask8) __builtin_ia32_cvtw2mask128 ((__v8hi) __A);
+}
+
+static __inline__ __mmask16 __DEFAULT_FN_ATTRS
+_mm256_movepi16_mask (__m256i __A)
+{
+  return (__mmask16) __builtin_ia32_cvtw2mask256 ((__v16hi) __A);
+}
+
 static __inline__ __m128i __DEFAULT_FN_ATTRS
 _mm_movm_epi8 (__mmask16 __A)
 {
Index: cfe/trunk/lib/Headers/avx512bwintrin.h
===================================================================
--- cfe/trunk/lib/Headers/avx512bwintrin.h
+++ cfe/trunk/lib/Headers/avx512bwintrin.h
@@ -2063,6 +2063,12 @@
   return (__mmask64) __builtin_ia32_cvtb2mask512 ((__v64qi) __A);
 }
 
+static __inline__ __mmask32 __DEFAULT_FN_ATTRS
+_mm512_movepi16_mask (__m512i __A)
+{
+  return (__mmask32) __builtin_ia32_cvtw2mask512 ((__v32hi) __A);
+}
+
 static __inline__ __m512i __DEFAULT_FN_ATTRS
 _mm512_movm_epi8 (__mmask64 __A)
 {
Index: cfe/trunk/include/clang/Basic/BuiltinsX86.def
===================================================================
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def
@@ -2256,6 +2256,9 @@
 TARGET_BUILTIN(__builtin_ia32_vcvtph2ps256_mask, "V8fV8sV8fUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_vcvtps2ph_mask, "V8sV4fIiV8sUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_vcvtps2ph256_mask, "V8sV8fIiV8sUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_cvtw2mask512, "UiV32s","","avx512bw")
+TARGET_BUILTIN(__builtin_ia32_cvtw2mask128, "UcV8s","","avx512bw,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_cvtw2mask256, "UsV16s","","avx512bw,avx512vl")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN
Index: cfe/trunk/test/CodeGen/avx512vlbw-builtins.c
===================================================================
--- cfe/trunk/test/CodeGen/avx512vlbw-builtins.c
+++ cfe/trunk/test/CodeGen/avx512vlbw-builtins.c
@@ -2375,3 +2375,15 @@
   // CHECK: @llvm.x86.avx512.mask.dbpsadbw.256
   return _mm256_maskz_dbsad_epu8(__U, __A, __B, 170); 
 }
+__mmask8 test_mm_movepi16_mask(__m128i __A) {
+  // CHECK-LABEL: @test_mm_movepi16_mask
+  // CHECK: @llvm.x86.avx512.cvtw2mask.128
+  return _mm_movepi16_mask(__A); 
+}
+
+__mmask16 test_mm256_movepi16_mask(__m256i __A) {
+  // CHECK-LABEL: @test_mm256_movepi16_mask
+  // CHECK: @llvm.x86.avx512.cvtw2mask.256
+  return _mm256_movepi16_mask(__A); 
+}
+
Index: cfe/trunk/test/CodeGen/avx512bw-builtins.c
===================================================================
--- cfe/trunk/test/CodeGen/avx512bw-builtins.c
+++ cfe/trunk/test/CodeGen/avx512bw-builtins.c
@@ -1530,3 +1530,10 @@
   // CHECK: @llvm.x86.avx512.psad.bw.512
   return _mm512_sad_epu8(__A, __B); 
 }
+
+__mmask32 test_mm512_movepi16_mask(__m512i __A) {
+  // CHECK-LABEL: @test_mm512_movepi16_mask
+  // CHECK: @llvm.x86.avx512.cvtw2mask.512
+  return _mm512_movepi16_mask(__A); 
+}
+


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