[llvm] r268154 - AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits

[Tom Stellard via llvm-commits]

Author: tstellar
Date: Fri Apr 29 23:04:48 2016
New Revision: 268154

URL: http://llvm.org/viewvc/llvm-project?rev=268154&view=rev
Log:
AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits

This was supposed to be part of r268143.

Modified:
    llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp
    llvm/trunk/test/CodeGen/AMDGPU/missing-store.ll
    llvm/trunk/test/CodeGen/AMDGPU/salu-to-valu.ll

Modified: llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp?rev=268154&r1=268153&r2=268154&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInsertWaits.cpp Fri Apr 29 23:04:48 2016
@@ -634,12 +634,6 @@ bool SIInsertWaits::runOnMachineFunction
         insertDPPWaitStates(I);
       }
 
-      // Insert required wait states for SMRD reading an SGPR written by a VALU
-      // instruction.
-      if (ST.getGeneration() <= AMDGPUSubtarget::SOUTHERN_ISLANDS &&
-          I->getOpcode() == AMDGPU::V_READFIRSTLANE_B32)
-        TII->insertWaitStates(MBB, std::next(I), 4);
-
       // Record pre-existing, explicitly requested waits
       if (I->getOpcode() == AMDGPU::S_WAITCNT) {
         handleExistingWait(*I);

Modified: llvm/trunk/test/CodeGen/AMDGPU/missing-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/missing-store.ll?rev=268154&r1=268153&r2=268154&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/missing-store.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/missing-store.ll Fri Apr 29 23:04:48 2016
@@ -10,7 +10,8 @@
 ; SI: buffer_store_dword
 ; SI: v_readfirstlane_b32 s[[PTR_LO:[0-9]+]], v{{[0-9]+}}
 ; SI: v_readfirstlane_b32 s[[PTR_HI:[0-9]+]], v{{[0-9]+}}
-; SI-NEXT: s_nop
+; SI: s_load_dword
+; SI: s_nop 2
 ; SI: s_load_dword s{{[0-9]+}}, s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}
 ; SI: buffer_store_dword
 ; SI: s_endpgm

Modified: llvm/trunk/test/CodeGen/AMDGPU/salu-to-valu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/salu-to-valu.ll?rev=268154&r1=268153&r2=268154&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/salu-to-valu.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/salu-to-valu.ll Fri Apr 29 23:04:48 2016
@@ -56,7 +56,8 @@ done:
 ; SI: s_movk_i32 [[OFFSET:s[0-9]+]], 0x2ee0
 ; GCN: v_readfirstlane_b32 s[[PTR_LO:[0-9]+]], v{{[0-9]+}}
 ; GCN: v_readfirstlane_b32 s[[PTR_HI:[0-9]+]], v{{[0-9]+}}
-; SI-NEXT: s_nop
+; SI: s_mov_b32
+; SI: s_nop 2
 ; SI: s_load_dword [[OUT:s[0-9]+]], s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, [[OFFSET]]
 ; CI: s_load_dword [[OUT:s[0-9]+]], s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, 0xbb8
 ; GCN: v_mov_b32_e32 [[V_OUT:v[0-9]+]], [[OUT]]