[PATCH] D10640: [mips][microMIPS] Implement LWP and SWP instructions

[Zlatko Buljan via llvm-commits]

zbuljan updated this revision to Diff 55537.
zbuljan added a comment.
Herald added a subscriber: sdardis.

Rebased to work with TOT.
Added check for Rd and Base registers of LWP to MipsAsmParser::checkTargetMatchPredicate method.
Added invalid test for the case of same Rd and Base registers of LWP instruction.
Renamed mem_simm12gpr to mem_simm12 and added DiagnosticType "MemSImm12" to MipsMemSimm12AsmOperand class.
Added selection of proper register class (32/64-bit) to addRegPairOperands method (MipsAsmParser.cpp).


http://reviews.llvm.org/D10640

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  lib/Target/Mips/Disassembler/MipsDisassembler.cpp
  lib/Target/Mips/MicroMips32r6InstrFormats.td
  lib/Target/Mips/MicroMips32r6InstrInfo.td
  lib/Target/Mips/MicroMipsInstrInfo.td
  test/MC/Disassembler/Mips/micromips32r6/valid.txt
  test/MC/Disassembler/Mips/micromips64r6/valid.txt
  test/MC/Mips/micromips/invalid.s
  test/MC/Mips/micromips32r6/invalid.s
  test/MC/Mips/micromips32r6/valid.s
  test/MC/Mips/micromips64r6/invalid.s
  test/MC/Mips/micromips64r6/valid.s

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